SPC56EL60L5 datasheet(100/160 Pages) STMICROELECTRONICS

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Electrical characteristics

SPC56XL60/54

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Doc ID 15457 Rev 8

Thermal characterization parameter indicating the temperature difference between the package top and the junction

temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written

as Psi-JT.

Table 12.

Thermal characteristics for LQFP144 package(1)

Symbol

Parameter

Conditions

Value

Unit

RθJA

Thermal resistance, junction-to-ambient

natural convection(2)

Single layer board – 1s

°C/W

Four layer board – 2s2p

RθJMA

Thermal resistance, junction-to-ambient forced

convection at 200 ft/min

Single layer board – 1s

°C/W

Four layer board – 2s2p

RθJB

Thermal resistance junction-to-board(3)

—24

°C/W

RθJC

Thermal resistance junction-to-case(4)

—8

°C/W

ΨJT

Junction-to-package-top natural convection(5)

—2

°C/W

Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)

temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal

resistance.

Junction-to-Ambient thermal resistance determined per JEDEC JESD51-3 and JESD51-6. Thermal test board meets

JEDEC specification for this package.

Junction-to-Board thermal resistance determined per JEDEC JESD51-8. Thermal test board meets JEDEC specification

for the specified package.

Junction-to-Case at the top of the package determined using MIL-STD 883 Method 1012.1. The cold plate temperature is

used for the case temperature. Reported value includes the thermal resistance of the interface layer.

Thermal characterization parameter indicating the temperature difference between the package top and the junction

temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written

as Psi-JT.

Table 13.

Thermal characteristics for LFBGA257 package(1)

Symbol

Parameter

Conditions

Value

Unit

RθJA

Thermal resistance junction-to-ambient natural

convection(2)

Single layer board – 1s

°C/W

Four layer board – 2s2p

RθJMA

Thermal resistance, junction-to-ambient forced

convection at 200 ft/min

Single layer board – 1s

°C/W

Four layer board – 2s2p

RθJB

Thermal resistance junction-to-board(3)

—13

°C/W

RθJC

Thermal resistance junction-to-case(4)

—8

°C/W

ΨJT

Junction-to-package-top natural convection(5)

—2

°C/W

Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)

temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal

resistance.

Junction-to-Ambient thermal resistance determined per JEDEC JESD51-3 and JESD51-6. Thermal test board meets

JEDEC specification for this package.

Junction-to-Board thermal resistance determined per JEDEC JESD51-8. Thermal test board meets JEDEC specification

for the specified package.

Junction-to-Case at the top of the package determined using MIL-STD 883 Method 1012.1. The cold plate temperature is

used for the case temperature. Reported value includes the thermal resistance of the interface layer.

Thermal characterization parameter indicating the temperature difference between the package top and the junction

temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written

as Psi-JT.

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