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SPC560B64L5 Datasheet(PDF) 83 Page - STMicroelectronics |
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SPC560B64L5 Datasheet(HTML) 83 Page - STMicroelectronics |
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83 / 134 page ![]() SPC560B54/6x Electrical characteristics Doc ID 15131 Rev 6 83/134 4.8.2 Low voltage detector electrical characteristics The device implements a power-on reset (POR) module to ensure correct power-up initialization, as well as five low voltage detectors (LVDs) to monitor the VDD and the VDD_LV voltage while device is supplied: ● POR monitors VDD during the power-up phase to ensure device is maintained in a safe reset state (refer to RGM Destructive Event Status (RGM_DES) Register flag F_POR in device reference manual) ● LVDHV3 monitors VDD to ensure device reset below minimum functional supply (refer to RGM Destructive Event Status (RGM_DES) Register flag F_LVD27 in device reference manual) ● LVDHV3B monitors VDD_BV to ensure device reset below minimum functional supply (refer to RGM Destructive Event Status (RGM_DES) Register flag F_LVD27_VREG in device reference manual) ● LVDHV5 monitors VDD when application uses device in the 5.0 V ± 10% range (refer to RGM Functional Event Status (RGM_FES) Register flag F_LVD45 in device reference manual) ● LVDLVCOR monitors power domain No. 1 (refer to RGM Destructive Event Status (RGM_DES) Register flag F_LVD12_PD1 in device reference manual) ● LVDLVBKP monitors power domain No. 0 (refer to RGM Destructive Event Status (RGM_DES) Register flag F_LVD12_PD0 in device reference manual) Note: When enabled, power domain No. 2 is monitored through LVDLVBKP. Figure 10. Low voltage detector vs reset VDD VLVDHVxH RESET VLVDHVxL |
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