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RT9715CGF Datasheet(PDF) 2 Page - Richtek Technology Corporation |
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RT9715CGF Datasheet(HTML) 2 Page - Richtek Technology Corporation |
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2 / 15 page ![]() RT9715 2 DS9715-03 April 2011 www.richtek.com Function Block Diagram Pin No. SOT-23-5 SOT-23-5 (G-Type) SOT-23-5 (R-Type) SOP-8 / MSOP-8 WDFN-8L 3X3 Pin Name Pin Function 1 1 5 6 , 7 , 8 6 , 7 , 8 VOUT Output Voltage. 2 2 2 1 1 GND Ground. 3 -- 1 5 5 FLG Fault FLAG Output. 4 4 3 4 4 EN/EN Chip Enable (Active High/Low). 5 5 4 2 , 3 2 , 3 VIN Power Input Voltage. -- 3 -- -- -- NC No Internal Connection. -- -- -- -- 9 (Exposed Pad) The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. Functional Pin Description Typical Application Circuit Note : A low-ESR 150uF aluminum electrolytic or tantalum between VOUT and GND is strongly recommended to meet the 330mV maximum droop requirement in the hub VBUS. (see Application Information Section for further details) Supply Voltage 2.7V to 5.5V VIN VOUT GND RT9715 Over -Current VBUS D+ D- GND USB Controller 1uF 150uF 10uF Pull-Up Resistor (10K to 100K) Ferrite Beads Data FLG EN/EN CIN COUT RT9715B/D/F/H Chip Enable RT9715A/C/E/G Chip Enable Gate Control Output Voltage Detection Delay Oscillator UVLO Charge Pump Bias Thermal Protection Current Limiting VOUT VIN GND EN/EN FLG Auto Discharge |
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