PWM DC Motor Regulator – Data Sheet

AS8410

Rev. 1.0, December 2000

4.1 Normal Operating Mode (regulation loop)

The regulation loop of the AS8410 consist of the following functional blocks:

1. Analogue / Digital Interface with signal conditioning (set value input / failure signal

output IN, modus input MODE and low pass filter input Cint2)

2. Regulator characteristic generator

(high resolution of the set value for set

values < 50 % and lower resolution for set values 50 % … 100 %)

5. Power FET driver with slew rate regulation controlling the external power FET gate

connected at pin OUT

6. Motor current measurement unit (measuring and converting the voltage over the ex-

Ω )

8. Charge pump with external capacitors at the pins Pump_ctrl and Vpump

9. 5V-regulator with bandgap reference

4.1.1

Analogue / Digital Interface, Signal Conditioning

This interface consists of the three pins MODE, IN and Cint2. The interface sets the operating

mode by the signal MODE, monitors and converts the input set value at the pin IN and drives

the pin IN to the low level in case of a detected failure in operating mode 1.

In operating mode 1 (OM1) the incoming low frequency PWM signal is converted in a dc voltage

µA with the incoming duty ratio to the pin Cint2 with R

(typical: 200 k

Ω / 2.2 µF). V

sleep / wake function and the input failure detection in operating mode 1, the hysteresis of these

detections is given in Fig. 4.2.

Symbol

Meaning

Meaning of the level

MODE Operating mode of the AS8410

MODE = high

MODE = low

Ü

Ü

Operating mode 1 (OM1)

Operating mode 2 (OM2)

P00

Detection of the 5 % threshold

value of the set value

P00 = high

P00 = low

Ü

Ü

Set value < 5 %

Set value > 5 %

P10

Detection of the 10 % threshold

value of the set value

P10 = high

P10 = low

Ü

Ü

Set value = 5 % ... 17.5 %)

Set value outside of this range