AD5317 datasheet(17/20 Pages) AD

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REV. 0

AD5332/AD5333/AD5342/AD5343

–17–

Decoding Multiple AD5332/AD5333/AD5342/AD5343

The CS pin on these devices can be used in applications to decode

a number of DACs. In this application, all DACs in the system

receive the same data and WR pulses, but only the CS to one of

the DACs will be active at any one time, so data will only be

written to the DAC whose CS is low. If multiple AD5343s are

being used, a common HBEN line will also be required to

determine if the data is written to the high-byte or low-byte

The 74HC139 is used as a 2- to 4-line decoder to address any

of the DACs in the system. To prevent timing errors from

occurring, the enable input should be brought to its inactive

state while the coded address inputs are changing state. Figure 36

shows a diagram of a typical setup for decoding multiple devices

in a system. Once data has been written sequentially to all DACs in

a system, all the DACs can be updated simultaneously using a

common LDAC line. A common CLR line can also be used to

reset all DAC outputs to zero.

ENABLE

CODED

ADDRESS

VDD

VCC

74HC139

DGND

1Y0

1Y1

1Y2

1Y3

HBEN

LDAC

CLR

DATA

INPUTS

DATA

INPUTS

DATA

INPUTS

DATA

INPUTS

*AD5343 ONLY

HBEN*

LDAC

CLR

AD5332/AD5333/

AD5342/AD5343

AD5332/AD5333/

AD5342/AD5343

AD5332/AD5333/

AD5342/AD5343

AD5332/AD5333/

AD5342/AD5343

HBEN*

LDAC

CLR

HBEN*

LDAC

CLR

HBEN*

LDAC

CLR

Figure 36. Decoding Multiple DAC Devices

AD5332/AD5333/AD5342/AD5343 as a Digitally Program-

mable Window Detector

A digitally programmable upper/lower limit detector using the

two DACs in the AD5332/AD5333/AD5342 is shown in Figure

37. The upper and lower limits for the test are loaded to DACs

A and B which, in turn, set the limits on the CMP04. If a signal

at the VIN input is not within the programmed window, an LED

will indicate the fail condition.

Note that the AD5343 has only a single reference input. If using

the AD5332, AD5333, or AD5342, both reference inputs must

be connected.

0.1 F

10 F

AD5332/AD5333/

AD5342

GND

VDD

VOUT

VREFB*

*NOT AD5343

VOUTB

VIN

FAIL

PASS

PASS/

FAIL

1/6 74HC05

1/2

CMP04

VREFA*

VREF

Figure 37. Programmable Window Detector

Programmable Current Source

Figure 38 shows the AD5332/AD5333/AD5342/AD5343 used

as the control element of a programmable current source. In this

example, the full-scale current is set to 1 mA. The output volt-

age from the DAC is applied across the current setting resistor

of 4.7 k

Ω in series with the 470 Ω adjustment potentiometer,

which gives an adjustment of about

±5%. Suitable transistors to

place in the feedback loop of the amplifier include the BC107

and the 2N3904, which enable the current source to operate

from a minimum VSOURCE of 6 V. The operating range is deter-

mined by the operating characteristics of the transistor. Suitable

amplifiers include the AD820 and the OP295, both having rail-

to-rail operation on their outputs. The current for any digital

input code and resistor value can be calculated as follows:

REF

=×

()

Where:

G is the gain of the buffer ampliﬁer (1 or 2)

D is the digital equivalent of the digital input code

N is the DAC resolution (8, 10, or 12 bits)

R is the sum of the resistor plus adjustment potentiometer in k

Ω

AD5332/AD5333/

AD5342/AD5343

GND

VDD = 5V

EXT

REF

VOUT*

AD780/REF192

WITH VDD = 5V

GND

VIN

VOUT

VREF*

VDD

4.7k

*ONLY ONE CHANNEL OF VREF AND VOUT SHOWN

0.1 F

10 F

470

LOAD

VSOURCE

Figure 38. Programmable Current Source

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