REV. A

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otherwise under any patent or patent rights of Analog Devices.

a

CMOS 16-Bit,

468.75 kHz, Sigma-Delta ADC

AD7721

Use of a single bit DAC in the modulator guarantees excellent

linearity and dc accuracy. Endpoint accuracy is ensured by on-

chip calibration of offset and gain. This calibration procedure

minimizes the part’s zero-scale and full-scale errors.

The output data is accessed from the output register through a

serial or parallel port. This offers easy, high speed interfacing to

modern microcontrollers and digital signal processors. The

serial interface operates in internal clocking (master) mode, the

AD7721 providing the serial clock.

CMOS construction ensures low power dissipation while a

power-down mode reduces the power consumption to only

100

µW.

GENERAL DESCRIPTION

The AD7721 is a complete low power, 12-/16-bit, sigma-delta

ADC. The part operates from a +5 V supply and accepts a

differential input of 0 V to 2.5 V or

±1.25 V. The analog input

is continuously sampled by an analog modulator at twice the

clock frequency eliminating the need for external sample-and-

hold circuitry. The modulator output is processed by two finite

impulse response (FIR) digital filters in series. The on-chip

filtering reduces the external antialias requirements to first order

in most cases. Settling time for a step input is 97.07

µs while

the group delay for the filter is 48.53

µs when the master clock

equals 15 MHz.

The AD7721 can be operated with input bandwidths up to

229.2 kHz. The corresponding output word rate is 468.75 kHz.

The part can be operated with lower clock frequencies also.

The sample rate, filter corner frequency and output word rate

will be reduced also, as these are proportional to the external

clock frequency. The maximum clock frequencies in parallel

mode and serial mode are 10 MHz and 15 MHz respectively.

FEATURES

16-Bit Sigma-Delta ADC

468.75 kHz Output Word Rate (OWR)

No Missing Codes

Low-Pass Digital Filter

High Speed Serial Interface

Linear Phase

229.2 kHz Input Bandwidth

5%

Standby Mode (70

W)

Parallel Mode (12-Bit/312.5 kHz OWR)

FUNCTIONAL BLOCK DIAGRAM

VIN1

AGND

DGND

DB8

SDATA/DB11

DB9

DRDY

RFS/DB10

12-BIT A/D CONVERTER

-

MODULATOR

FIR

FILTER

CONTROL LOGIC

DB4

AD7721

STBY/DB0

CAL/DB1

CLK

VIN2

DB3

DVAL/

SYNC

UNI/DB2

CS

RD

WR

REFIN

DSUBST

DGND

SYNC/

DB5

DB6

SCLK/

DB7

AGND

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Tel: 781/329-4700

World Wide Web Site: http://www.analog.com

Fax: 781/326-8703

© Analog Devices, Inc., 1997