AD7839

–10–

REV. 0

DUTGND Voltage Range

Ω thin-film

resistor. The DUTGND potential must obey the max ratings at

all times. Thus, the voltage at DUTGND must always be within

relevant DUTGND potential during power-on, the voltage

applied to DUTGND should also be kept within the range

GND – 2 V, GND + 2 V.

Once the AD7839 has powered on and the on-chip amplifiers

have settled, any voltage that is now applied to the DUTGND

pin is subtracted from the DAC output, which has been gained

up by a factor of two. Thus, for specified operation, the maxi-

mum voltage that can be applied to the DUTGND pin in-

minimum voltage that can be applied to DUTGND is the

powered on, the outputs can track any DUTGND voltage within

this minimum/maximum range.

Power Supply Sequencing

When operating the AD7839, it is important that ground be

connected at all times to avoid high current states. The recom-

absolute max ratings will ensure protection. The reference in-

puts and digital inputs should be powered up last. Should the

tors should be inserted in series with the reference inputs to

limit the current to 20 mA. Logic inputs should not be applied

Ω), in series with the

MICROPROCESSOR INTERFACING

Interfacing the AD7839—16-Bit Interface

The AD7839 can be interfaced to a variety of 16-bit micro-

controllers or DSP processors. Figure 19 shows the AD7839

interfaced to a generic 16-bit microcontroller/DSP processor.

The lower address lines from the processor are connected to A0,

A1 and A2 on the AD7839 as shown. The upper address lines

are decoded to provide a chip select signal or an

LDAC signal

for the AD7839. The fast interface timing of the AD7839 allows

direct interface to a wide variety of microcontrollers and DSPs

as shown in Figure 19.

AD7839

CONTROLLER/

DSP PROCESSOR*

ADDRESS

DECODE

D12

D0

DATA

BUS

UPPER BITS OF

ADDRESS BUS

A2

A1

A0

R/

W

*ADDITIONAL PINS OMITTED FOR CLARITY

D12

D0

CS

LDAC

A2

A1

A0

WR

Figure 19. AD7839 Parallel Interface

APPLICATIONS

Power Supply Bypassing and Grounding

In any circuit where accuracy is important, careful consideration

of the power supply and ground return layout helps to ensure

the rated performance. The printed circuit board on which the

AD7839 is mounted should be designed such that the analog

and digital sections are separated and confined to certain areas

of the board. This facilitates the use of ground planes that can

be easily separated. A minimum etch technique is generally best

for ground planes as it gives the best shielding. Digital and ana-

log ground planes should be joined at only one place. The GND

pin of the AD7839 should be connected to the AGND of the

system. If the AD7839 is in a system where multiple devices

require an AGND-to-DGND connection, the connection should

be made at one point only, a star ground point that should be

established as close as possible to the AD7839.

Digital lines running under the device should be avoided as

these will couple noise onto the die. The analog ground plane

should be allowed to run under the AD7839 to avoid noise

coupling. The power supply lines of the AD7839 should use as

large a trace as possible to provide low impedance paths and

reduce the effects of glitches on the power supply line. Fast

switching signals like clocks should be shielded with digital

ground to avoid radiating noise to other parts of the board and

should never be run near the analog inputs.

Avoid crossover of digital and analog signals. Traces on opposite

sides of the board should run at right angles to each other. This

reduces the effects of feedthrough through the board. A micro-

strip technique is by far the best but not always possible with a

double sided board. In this technique, the component side of

the board is dedicated to ground plane while signal traces are

placed on the solder side.

The AD7839 should have ample supply bypassing located as

close to the package as possible, ideally right up against the

device. Figure 20 shows the recommended capacitor values of

10

µF in parallel with 0.1 µF on each of the supplies. The 10 µF

capacitors are the tantalum bead type. The 0.1

µF capacitor

should have low Effective Series Resistance (ESR) and Effective

Series Inductance (ESI), such as the common ceramic types,

which provide a low impedance path to ground at high frequen-

cies to handle transient currents due to internal logic switching.

10 F

0.1 F10 F

0.1 F

10 F

0.1 F

AD7839

Figure 20. Recommended Decoupling Scheme for AD7839