AD8026

–7–

REV. 0

In a system application, the part is designed assuming that each

–Input will be driven from a low impedance source, while each

+Input will be driven by a current-output DAC with a 500

Ω

termination resistor. Thus, to first order, each on-chip series

input resistor to each +Input is 500

Ω less than the parallel

combination of the gain-setting resistors. The offset-inducing

effect of the bias currents is minimized by this scheme.

Figure 18 shows how to drive the AD8026 with a fixed positive

gain of 8/3 from a current output DAC. The gain and offset

errors are minimized by using a 500

Ω resistor (R

should be directly connected to ground, or driven from a low

output impedance source to ensure minimum offset and maxi-

mum gain accuracy.

If the +Input of any of the op amps is driven from a voltage

source, the low offset voltage of the AD8026 can be maintained

by adding a series resistance of 500

Ω between the source and

the +Input to the AD8026. This is illustrated in Figure 19. If

the –Input is to be driven, such as when creating an offset volt-

age, then a low source impedance should be provided in order

to maintain both gain and offset accuracy.

1/4 AD8026

500

CURRENT-

OUTPUT

DAC

10 F

0.1 F

10 F

0.1 F

Figure 18. Low Offset and High Gain Accuracy Circuit for

Driving the AD8026 from a Current Output DAC

VOLTAGE-

OUTPUT

DRIVER

1/4 AD8026

500

10 F

0.1 F

10 F

0.1 F

Figure 19. Low Offset and High Gain Accuracy Circuit for

Driving the AD8026 from a Voltage Source

QUAD AMPLIFIER CHARACTERIZATION BOARD

Figure 20. Component Side

Figure 21. Solder Side

Figure 22. Silkscreen