AD8314ARM datasheet(7/16 Pages) AD

7 / 16 page

AD8314

–7–

REV. 0

VS – Volts

2.3

1.7

2.7

2.2

2.1

2.0

1.9

1.8

2.8

2.9

3.0

3.1

3.2

3.3

3.4

3.5

0mA

2mA

4mA

6mA

Figure 19. Maximum VDN Voltage vs. VS by Load Current

1 s PER

HORIZONTAL

DIVISION

VPOS AND ENABLE

2V PER

VERTICAL

DIVISION

VDN 500mV/VERT. DIV.

VUP

VUP 500mV/VERT. DIV.

AVERAGE: 128 SAMPLES

VDN GND

VUP GND

GND

Figure 20. Power-On and -Off Response, Measurement

Mode

HP8648B

SIGNAL

GENERATOR

ENBL

RFIN

AD8314

RF OUT

TEK

TDS784C

SCOPE

TRIG

OUT

HP8116A

PULSE

GENERATOR

10MHz REF OUTPUT

EXT TRIG

NC = NO CONNECT

VSET

FLTR

V DN

VPOS

COMM

V UP

TEK P6204

FET PROBE

TEK P6204

FET PROBE

TRIG

52.3

PULSE

OUT

49.9

AD811

732

–33dBV

Figure 21. Test Setup for Power-On and -Off Response

VS – Volts

2.3

1.7

2.7

2.2

2.1

2.0

1.9

1.8

2.8

2.9

3.0

3.1

3.2

3.3

3.4

3.5

SHADING INDICATES

3 SIGMA

Figure 22. Maximum VDN Voltage vs. VS with 3 mA Load

100ns PER

HORIZONTAL

DIVISION

200mV PER

VERTICAL

DIVISION

VDN

AVERAGE: 128 SAMPLES

2V PER

VERTICAL

DIVISION

VPOS AND ENABLE

VDN GND

GND

Figure 23. Power-On Response, VDN, Controller Mode with

VSET Held Low

ENBL

RFIN

AD8314

RF OUT

TEK

TDS784C

SCOPE

TRIG

OUT

HP8112A

PULSE

GENERATOR

10MHz REF OUTPUT

EXT TRIG

NC = NO CONNECT

VSET

FLTR

V DN

VPOS

COMM

V UP

TEK P6204

FET PROBE

TRIG

52.3

+0.2

AD811

PULSE

OUT

49.9

732

HP8648B

SIGNAL

GENERATOR

Figure 24. Test Setup for Power-On Response at V_DN

Output, Controller Mode with VSET Pin Held Low

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