ADMC300BST datasheet(2/42 Pages) AD

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REV. B

ADMC300–SPECIFICATIONS

RECOMMENDED OPERATING CONDITIONS

B Grade

Parameter

Min

Max

Units

VDD

Digital Supply Voltage

4.50

5.50

AVDD

Analog Supply Voltage

4.50

5.50

TAMB

Ambient Operating Temperature

–40

+85

°C

ELECTRICAL CHARACTERISTICS

Parameter

Test Conditions

Min

Max

Unit

VIH

Hi-Level Input Voltage

1, 2

@ VDD = Max

2.0

VIL

Lo-Level Input Voltage

1, 2

@ VDD = Min

0.8

VOH

Hi-Level Output Voltage

1, 3

@ VDD = Min,

2.4

IOH = –1.0 mA

@ VDD = Min,

VDD – 0.3

IOH = –0.1 mA

VOL

Lo-Level Output Voltage

1, 3

@ VDD = Min,

0.4

IOL = 2.0 mA

IIH

Hi-Level Input Current

@ VDD = Max,

µA

VIN = VDD Max

IIH

Hi-Level

PWMTRIP, PIO0–PIO11 Current

@ VDD = Max,

100

µA

VIN = VDD Max

IIH

Hi-Level PWMPOL Current

@ VDD = Max,

µA

VIN = VDD Max

IIL

Lo-Level Input Current

@ VDD = Max,

µA

VIN = 0 V

IIL

Lo-Level

PWMTRIP, PIO0–PIO11 Current

@ VDD = Max,

µA

VIN = 0 V

IIL

Lo-Level PWMPOL Current

@ VDD = Max,

100

µA

VIN = 0 V

IOZH

Hi-Level Three-State Leakage Current

@ VDD = Max,

µA

VIN = VDD Max

IOZL

Lo-Level Three-State Leakage Current

@ VDD = Max,

µA

VIN = 0 V

IDD

Digital Power Supply Current (Dynamic)6, 7

@ VDD = Max

100

IDD

Analog Power Supply Current (Disabled)

@ AVDD = VDD = Max

100

µA

IDD

Analog Power Supply Current (Ref Only)

@ AVDD = VDD = Max

6.5

IDD

Analog Power Supply Current (Ref + BankA)

@ AVDD = VDD = Max

11.0

IDD

Analog Power Supply Current (Ref + BankB)

@ AVDD = VDD = Max

13.0

IDD

Analog Power Supply Current (Ref + BankA/B)

@ AVDD = VDD = Max

18.0

NOTES

1Bidirectional pins: PIO0–PIO11, RFS0, RFS1, TFS0, TFS1, SCLK0, SCLK1.

2Input only pins:

PWMTRIP, PWMPOL, RESET, EIA, EIB, EIZP, DR1A, DR1B, DR0, CLKIN.

3Output pins: PWMSYNC, CL, CH, BL, BH, AL, AH, MUX0–MUX2, AUX0, AUX1, CLKOUT, DT0, DT1.

4Input only pins:

RESET, EIA, EIB, EIZP, DR1A, DR1B, DR0, CLKIN.

5Three-stateable pins: DT0, DT1, RFS0, RFS1, TFS0, TFS1, SCLK0, SCLK1.

6Current reflects device operating with no output loads.

7Dynamic condition refers to continuous operation of the DSP core, ADC banks and PWM generation in single update mode with PWMTM = 0x0480, ADCDIVA =

ADCDIVB = 0x180. The encoder inputs are quiescent.

8Disabled refers to powering down both ADC banks and the internal reference generation circuit by setting Bits 10, 11 and 12 of the ADCCTRL register. Current is

total current from AVDD supply.

Specifications subject to change without notice.

(VDD = AVDD = 5 V

10%, GND = AGND = 0 V, TAMB = –40 C to +85 C,

CLKIN = 12.5 MHz, unless otherwise noted)

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