AOZ1361DI datasheet(8/12 Pages) AOSMD

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AOZ1361DI

Rev. 2.0 October 2010

www.aosmd.com

Page 8 of 12

Detailed Description

Introduction

The AOZ1361DI is a 35m

Ω P-channel high-side load

switch with adjustable soft-start slew-rate control,

programmable current limit and thermal shutdown.

It operates with an input voltage range from 4.5V to 28V.

Enable

The EN pin is the ON/OFF control for the output switch.

The device is enabled when EN pin is high and VIN is

above UVLO. The EN pin must be driven to a logic high

or logic low state to guarantee operation. While disabled,

the AOZ1361DI only draws about 1µA supply current.

Under-Voltage Lockout (UVLO)

The under-voltage lockout (UVLO) circuit of AOZ1361DI

monitors the input voltage and prevents the output

MOSFET from turning on until VIN exceeds 3.9V.

Adjustable Soft-Start Slew-Rate Control

When the EN pin is asserted high, the slew rate control

circuitry applies voltage on the gate of the PMOS switch

in a manner such that the output voltage and current is

ramped up linearly until it reaches the steady-state load

current level. The slew rate can be adjusted by an

external capacitor connected to the SS pin to ground.

The slew rate rise time, Ton, can be set using the

following equation:

Programmable Current Limit

The current limit is programmed by an external resistor

connected to the SET pin to ground. This sets a

reference voltage to the current limit error amplifier that

compares it to a sensed voltage that is generated by

passing a small portion of the load current through an

internal amplifier. When the sensed load current exceeds

the set current limit, the load current is then clamped at

the set limit and the Vout drop should be the result of

resistance increasing. The AOZ1361DI will stay in this

condition until the load current no longer exceeds the

current limit or if the thermal shutdown protection is

engaged. To set the current limit use Figure 3 on the

following page.

Thermal Shut-down Protection

The thermal overload protection of AOZ1361DI is

engaged to protect the device from damage should the

die temperature exceeds safe margins due to a short

circuit, extreme loading or heating from external sources.

AOZ1361DI-01 (

Auto-restart version): During current

limit or short circuit conditions, the PMOS resistance

is increased to clamp the load current. This increases

the power dissipation in the chip causing the die

temperature to rise. When the die temperature

reaches 130°C the thermal shutdown circuitry will

shutdown the device. There is a 30°C hysterisis. The

device will turn back on and go through soft start

after the temperature drops below +100°C . The

thermal shutdown will cycle repeatedly until the over

temperature condition disappears or the enable pin is

pulled LOW.

AOZ1361DI-02 (

Latch-off version): Thermal

shut-down protection sets a fault latch and shuts off

the internal MOSFET and asserts the FLTB output if

the junction temperature exceeds +130°C. The

AOZ1361DI can be re-enabled by toggling EN pin

after the die temperature drops below +100°C.

FLTB

The FLTB pin is an open drain output that is asserted low

when either an over-current, short-circuit or over-

temperature condition occurs. To prevent false alarm, the

AOZ1361DI implements a fault delay time for over-

temperature, over-current and short-circuit fault

conditions. The FLTB pin becomes high impedance when

the fault conditions are removed. For AOZ1361DI-02, if

the temperature is higher than +130°C, the device will

latch off. After that, if temperature drops below +100°C,

the FLTB pin will pull high, which means the fault

condition has already been removed, although there is

no output voltage due to latch off function. A pull-up

resistor must be connected between FLTB to 5V or 3.3V

to provide a logic signal.

TFLT

TFLT is a fault delay pin, and its delay time is adjustable

by a capacitor connected from TFLT to GND. The delay

time can be calculated by:

CTLT (µs) = 600 µs / nF x CTFLT (nF)

Ton

Css

μA

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