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RT7232 Datasheet(PDF) 15 Page - Richtek Technology Corporation |
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RT7232 Datasheet(HTML) 15 Page - Richtek Technology Corporation |
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15 / 18 page  RT7231/32/33/34 15 DS7231/32/33/34-00 March 2013 www.richtek.com © Copyright 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. Layout Consideration Follow the PCB layout guidelines for optimal performance of the RT7231/32/33/34 Keep the traces of the main current paths as short and wide as possible. Put the input capacitor as close as possible to the device pins (VIN and GND). SW node is with high frequency voltage swing and should be kept at small area. Keep sensitive components away from the SW node to prevent stray capacitive noise pickup. Connect feedback network behind the output capacitors. Keep the loop area small. Place the feedback components near the RT7231/32/33/34 FB pin. The GND and Exposed Pad should be connected to a strong ground plane for heat sinking and noise protection. (a). For TSSOP-14 (Exposed Pad) Package Figure 6. Derating Curve of Maximum Power Dissipation Figure 7. PCB Layout Guide (c). For SOP-8 (Exposed) Package EN FB PVCC SS VIN BOOT GND SW GND 2 3 4 5 6 7 8 9 C2 C1 C6 L1 C7 VOUT C4 C5 R1 R2 GND Input capacitor must be placed as close to the IC as possible. SW should be connected to inductor by Wide and short trace. Keep sensitive components away from this trace. The resistor divider must be connected as close to the device as possible. 0.0 0.6 1.2 1.8 2.4 3.0 0 25 50 75 100 125 Ambient Temperature (°C) Four-Layer PCB TSSOP-14 (Exposed Pad) WDFN-10L 3x3 SOP-8 (Exposed Pad) (b). For WDFN-10L 3x3 Package FB VIN PGND GND SS PVCC PGOOD EN PGND SW SW BOOT VOUT VINR 4 2 3 5 7 6 11 13 12 10 8 9 14 PGND 15 R2 R1 CVCC CIN CBOOT L VOUT COUT SW should be connected to inductor by Wide and short trace. Keep sensitive components away from this trace. Place the feedback components as close to the FB as possible for better regulation. Place the input and output capacitors as close to the IC as possible. VOUT PGND CIN L VOUT VOUT CVCC R2 R1 PGND SW should be connected to inductor by wide and short trace. Keep sensitive components away from this trace. EN FB PGOOD SS VIN VIN BOOT SW SW PVCC 9 8 7 1 2 3 4 5 10 6 11 CBOOT COUT PGND Place the feedback components as close to the FB as possible for better regulation. Place the input and output capacitors as close to the IC as possible. |
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