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CT2566 Datasheet(PDF) 1 Page - Aeroflex Circuit Technology |
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CT2566 Datasheet(HTML) 1 Page - Aeroflex Circuit Technology |
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1 / 37 page ![]() eroflex Circuit T echnology – Data Bus Modules For The Future © SCDCT2566 REV B 8/10/99 Features • Second Source Compatible to the BUS-66300 • PGA Version available, (second source to the BUS-66312) • Compatible with MIL-STD-1750 CPUs • Compatible with MOTOROLA, INTEL, and ZILOG CPUs • Compatible with Aeroflex’s CT2565 BC/RT/MT and CT2512 RT • Minimizes CPU overhead • Signal controls for shared memory implementation • Transfers complete messages to shared memory • Provides memory mapped 1553 interface • Packaging – Hermetic Metal • 78 Pin, 2.1" x 1.87" x .25" PGA type package • 82 Lead, 2.2" x 1.61 x .18" Flat Package Description Aeroflex CT2566 MIL-STD-1553 to Microprocessor Interface Unit simplifies the CPU to 1553 Data Bus interface. The CT2566 provides an interface by using RAM allowing the CPU to transmit or receive 1553 traffic simply by accessing the memory. All 1553 message transfers are entirely memory or I/O mapped. The CT2566 supports 1553 interface devices such as Aeroflex's CT2512 dual RT or the CT2565 dual BC, RT, and MT. The CT2566 operates over the full military -55°C to +125°C temperature range. Figure 1 – Functional Block Diagram CT2566 MIL-STD-1553 to Microprocessor CIRCUIT TECHNOLOGY www.aeroflex.com Interface Unit F I E I D C E R T F L E X L A ISO 9001 CLOCK IN MSTRCLR SELECT STRBD READYD RD/WR MEM/REG EXTEN EXTLD INT IOEN BUSREQ BUSGRNT BUSACK OE WR MEMOE MEMCS CS MEMWR ADRINC NBGRNT BCSTART TAGEN EOM SOM MSGERR TIMEOUT STATERR LOOPERR CHB/CHA CTLINB/A CTLOUT B/A RTU/BC MT DBAC SSBUSY SSFLAG SVCREQ RESET OPERATION CONTROL REGISTERS CONFIGURATION REGISTER START / RESET REGISTER INTERRUPT MASK REGISTER INTERRUPT GENERATOR BLOCK STATUS WORD MICROCODE CONTROLLER CONTENTION RESOLVER MEMORY TIMING TIMING CPU A15-A00 D15-D00 |
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