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ADuM4471CRIZ Datasheet(PDF) 7 Page - Analog Devices

Part # ADuM4471CRIZ
Description  Isolated Switching Regulator with Quad-Channel Isolators
PDF  36 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADuM4471CRIZ Datasheet(HTML) 7 Page - Analog Devices

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Data Sheet
ADuM4470/ADuM4471/ADuM4472/ADuM4473/ADuM4474
Rev. 0 | Page 7 of 36
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
Logic High Output Voltages
VOAH, VOBH,
VOCH, VODH
VDDA − 0.3,
VISO − 0.3
3.3
V
IOx = −20 µA, VIx = VIxH
VDDA − 0.5,
VISO − 0.5
3.1
V
IOx = −4 mA, VIx = VIxH
Logic Low Output Voltages
VOAL, VOBL,
VOCL, VODL
0.0
0.1
V
IOx = 20 µA, VIx = VIxH
0.0
0.4
V
IOx = 4 mA, VIx = VIxH
AC SPECIFICATIONS
ADuM447xARIZ
Minimum Pulse Width
PW
1000
ns
CL = 15 pF, CMOS signal levels
Maximum Data Rate
1
Mbps
CL = 15 pF, CMOS signal levels
Propagation Delay
tPLH, tPHL
60
100
ns
CL = 15 pF, CMOS signal levels
Pulse Width Distortion, |tPLH − tPHL|
PWD
40
ns
CL = 15 pF, CMOS signal levels
Propagation Delay Skew
tPSK
50
ns
CL = 15 pF, CMOS signal levels
Channel-to-Channel Matching
tPSKCD/tPSKOD
50
ns
CL = 15 pF, CMOS signal levels
ADuM447xCRIZ
Minimum Pulse Width
PW
40
ns
CL = 15 pF, CMOS signal levels
Maximum Data Rate
25
Mbps
CL = 15 pF, CMOS signal levels
Propagation Delay
tPLH, tPHL
30
60
70
ns
CL = 15 pF, CMOS signal levels
Pulse Width Distortion, |tPLH − tPHL|
PWD
8
ns
CL = 15 pF, CMOS signal levels
Change vs. Temperature
5
ps/
°C
CL = 15 pF, CMOS signal levels
Propagation Delay Skew
tPSK
45
ns
CL = 15 pF, CMOS signal levels
Channel-to-Channel Matching,
tPSKCD
8
ns
CL = 15 pF, CMOS signal levels
Codirectional Channels
Channel-to-Channel Matching,
tPSKCD
15
ns
CL = 15 pF, CMOS signal levels
Opposing Directional Channels
Output Rise/Fall Time (10% to 90%)
tR/tF
2.5
ns
CL = 15 pF, CMOS signal levels
Common-Mode Transient Immunity
|CMH|
25
35
kV/µs
VIx = VDDA or VISO, VCM = 1000 V,
at Logic High Output
transient magnitude = 800 V
Common-Mode Transient Immunity
|CML|
25
35
kV/µs
VIx = 0 V or VISO, VCM = 1000 V,
at Logic Low Output
transient magnitude = 800 V
Refresh Rate
fr
1.0
Mbps
1 V
DD1 is the power supply for the push-pull transformer.
2 V
DDA is the power supply of Side 1 of the ADuM447x.
3 The contributions of supply current values for all four channels are combined at identical data rates.
4 The V
ISO supply current is available for external use when all data rates are below 2 Mbps. At data rates above 2 Mbps, the data I/O channels draw additional current
proportional to the data rate. Additional supply current associated with an individual channel operating at a given data rate can be calculated as described in the
Power Consumption section. The dynamic I/O channel load must be treated as an external load and included in the VISO power budget.
5 The power demands of the quiescent operation of the data channels were not separated from the power supply section. Efficiency includes the quiescent power
consumed by the I/O channels as part of the internal power consumption.
6 This current is available for driving external loads at the V
ISO output. All channels are simultaneously driven at a maximum data rate of 25 Mbps with full capacitive
load representing the maximum dynamic load conditions. Refer to the Power Consumption section for calculation of available current at less than the maximum
data rate.



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