STM32F303VC datasheet(87/133 Pages) STMICROELECTRONICS

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STM32F302xx/STM32F303xx

Electrical characteristics

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6.3.14

I/O port characteristics

General input/output characteristics

Unless otherwise specified, the parameters given in Table 52 are derived from tests

performed under the conditions summarized in Table 22. All I/Os are CMOS and TTL

compliant.

Table 52.

I/O static characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VIL

Low level input

voltage

TC and TTa I/O

0.3 VDD+0.07

(1)

FT and FTf I/O

0.475 VDD-0.2

(1)

BOOT0

0.3 VDD–0.3

(1)

All I/Os except BOOT0

0.3 VDD

(2)

VIH

High level input

voltage

TC and TTa I/O

0.445 VDD+0.398

(1)

FT and FTf I/O

0.5 VDD+0.2

(1)

BOOT0

0.2 VDD+0.95

(1)

All I/Os except BOOT0

0.7 VDD

(2)

Vhys

Schmitt trigger

hysteresis

TC and TTa I/O

200 (1)

FT and FTf I/O

100 (1)

BOOT0

300 (1)

Ilkg

Input leakage

current (3)

TC, FT and FTf I/O

TTa I/O in digital mode

VSS ≤ VIN ≤ VDD

±0.1

µA

TTa I/O in digital mode

VDD ≤ VIN ≤ VDDA

TTa I/O in analog mode

VSS ≤ VIN ≤ VDDA

±0.2

FT and FTf I/O(4)

VDD ≤ VIN ≤ 5V

RPU

Weak pull-up

equivalent resistor(5)

VIN = VSS

RPD

Weak pull-down

equivalent resistor(5)

VIN = VDD

CIO

I/O pin capacitance

Data based on design simulation.

Tested in production.

Leakage could be higher than the maximum value. if negative current is injected on adjacent pins. Refer to Table 51: I/O

current injection susceptibility.

To sustain a voltage higher than VDD +0.3 V, the internal pull-up/pull-down resistors must be disabled.

Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This

PMOS/NMOS contribution to the series resistance is minimum (~10% order).

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