ADF4159 datasheet(9/36 Pages) AD

9 / 36 page

Data Sheet

ADF4159

Rev. B | Page 9 of 36

11.99

12.00

12.01

12.02

12.03

12.04

12.05

12.06

100

150

200

TIME (µs)

Figure 12. Fast Ramp (Triangle Ramp with Different Slopes), fPFD = 100 MHz,

ICP = 2.5 mA, Loop Bandwidth = 250 kHz, CLK1 = 3; Up Ramp: CLK2 = 26,

DEV = 1024, DEV_OFFSET = 8, Number of Steps = 64; Down Ramp: CLK2 = 70,

DEV = 16,384, DEV_OFFSET = 8, Number of Steps = 4

–200

–150

–100

–50

100

150

200

100

150

200

TIME (µs)

Figure 13. Phase Shift Keying (PSK), Loop Bandwidth = 250 kHz,

Phase Value = 1024, Data Rate = 20 kHz

11.996

11.997

11.998

11.999

12.000

12.001

12.002

12.003

12.004

100

150

200

TIME (µs)

Figure 14. Frequency Shift Keying (FSK), Loop Bandwidth = 250 kHz,

DEV = 1049, DEV_OFFSET = 9, Data Rate = 20 kHz

11.994

11.996

11.998

12.000

12.002

12.004

12.006

12.008

12.010

12.012

12.014

100

200

300

400

500

TIME (µs)

Figure 15. FSK Ramp, fPFD = 100 MHz, ICP = 2.5 mA, Loop Bandwidth = 250 kHz,

CLK1 = 3, CLK2 = 26, DEV = 1024, DEV_OFFSET = 8, Number of Steps = 64;

FSK: DEV = −512, DEV_OFFSET = 8

–40

–35

–30

–25

–20

–15

–10

–5

FREQUENCY (GHz)

PRESCALER 8/9

PRESCALER 4/5

Figure 16. RFIN Sensitivity at Nominal Temperature

–6

–4

–2

0.5

1.0

1.5

2.0

2.5

3.0

VCP (V)

Figure 17. Charge Pump Output Characteristics

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