NCP431AVLPRAG datasheet(12/17 Pages) ONSEMI

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NCP431A, SC431A, NCP431B, NCP432B Series

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Figure 33. Simplified NCP431/NCP432 Device Model

NCP431/NCP432 OPEN−LOOP VOLTAGE GAIN

VERSUS FREQUENCY

Figure 34. Example 1 Circuit Open Loop Gain Plot

Example 2.

IC = 7.5 mA, RL = 2.2 kW, CL = 0.01 mF. Cathode tied to

reference input pin. An examination of the data sheet

stability boundary curve (Figure 18) shows that this value of

load capacitance and cathode current is on the boundary.

Define the transfer gain.

The DC gain is:

G + GMRGMGoRL + (2.138)(1.0M)(1.25m)(230)

+ 6389 + 76 dB

The resulting open loop Bode plot is shown in Figure 35.

The asymptotic plot may be expressed as the following

equation:

Av + 615

1 )

500 kHz

1 )

8.0 kHz

1 )

60 kHz

1 )

7.2 kHz

Note that the transfer function now has an extra pole

formed by the load capacitance and load resistance.

Note that the crossover frequency in this case is about

250 kHz, having a phase margin of about −46

°. Therefore,

instability of this circuit is likely.

NCP431/NCP432 OPEN−LOOP BODE PLOT WITH

LOAD CAP

Figure 35. Example 2 Circuit Open Loop Gain Plot

With three poles, this system is unstable. The only hope

for stabilizing this circuit is to add a zero. However, that can

only be done by adding a series resistance to the output

capacitance, which will reduce its effectiveness as a noise

filter. Therefore, practically, in reference voltage

applications, the best solution appears to be to use a smaller

value of capacitance in low noise applications or a very large

value to provide noise filtering and a dominant pole rolloff

of the system.

The NCP431/NCP432 is often used as a regulator in

secondary side of a switch mode power supply (SMPS).

The benefit of this reference is high and stable gain under

low bias currents. Figure 36 shows dependence of the gain

(dynamic impedance) on the bias current. Value of

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