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PIC16C64A Datasheet(PDF) 46 Page - Microchip Technology |
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PIC16C64A Datasheet(HTML) 46 Page - Microchip Technology |
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46 / 334 page ![]() PIC16C6X DS30234E-page 46 1997-2013 Microchip Technology Inc. 4.2.2.7 PIR2 REGISTER This register contains the CCP2 interrupt flag bit. Applicable Devices 61 62 62A R6263R63 64 64A R6465 65A R6566 67 . Note: Interrupt flag bits get set when an interrupt condition occurs regardless of the state of its corresponding enable bit or the global enable bit, GIE (INTCON<7>). User soft- ware should ensure the appropriate inter- rupt flag bits are clear prior to enabling an interrupt. FIGURE 4-21: PIR2 REGISTER (ADDRESS 0Dh) U-0 U-0 U-0 U-0 U-0 U-0 U-0 R/W-0 — — — — — — — CCP2IF R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ - n = Value at POR reset bit7 bit0 bit 7-1: Unimplemented: Read as '0' bit 0: CCP2IF: CCP2 Interrupt Flag bit Capture Mode 1 = A TMR1 register capture occurred (must be cleared in software) 0 = No TMR1 register capture occurred Compare Mode 1 = A TMR1 register compare match occurred (must be cleared in software) 0 = No TMR1 register compare match occurred PWM Mode Unused in this mode Interrupt flag bits get set when an interrupt condition occurs regardless of the state of its corresponding enable bit or the global enable bit, GIE (INTCON<7>). User software should ensure the appropriate interrupt flag bits are clear prior to enabling an interrupt. |
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