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PIC16F87 Datasheet(PDF) 59 Page - Microchip Technology |
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PIC16F87 Datasheet(HTML) 59 Page - Microchip Technology |
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59 / 230 page ![]() 2002-2013 Microchip Technology Inc. DS30487D-page 59 PIC16F87/88 FIGURE 5-8: BLOCK DIAGRAM OF RB0/INT/CCP1(3) PIN Note 1: I/O pins have diode protection to VDD and VSS. 2: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit. 3: The CCP1 pin is determined by the CCPMX bit in Configuration Word 1 register. Data Latch RBPU(2) P VDD Q D CK Q D CK Q D EN Data Bus WR PORTB WR TRISB RD TRISB RD PORTB Weak Pull-up RD PORTB I/O pin(1) TTL Input Buffer TRIS Latch 0 1 CCP CCP1M<3:0> = 1000, 1001, 11xx and CCPMX = 1 To INT0 or CCP CCP1M<3:0> = 000 |
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