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LCMXO2-640ZE-3TG100C Datasheet(PDF) 63 Page - Lattice Semiconductor |
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LCMXO2-640ZE-3TG100C Datasheet(HTML) 63 Page - Lattice Semiconductor |
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63 / 106 page  3-24 DC and Switching Characteristics MachXO2 Family Data Sheet tSU_DEL Clock to Data Setup - PIO Input Register with Data Input Delay MachXO2-256ZE 2.62 — 2.91 — 3.14 — ns MachXO2-640ZE 2.56 — 2.85 — 3.08 — ns MachXO2-1200ZE 2.30 — 2.57 — 2.79 — ns MachXO2-2000ZE 2.25 — 2.50 — 2.70 — ns MachXO2-4000ZE 2.39 — 2.60 — 2.76 — ns MachXO2-7000ZE 2.17 — 2.33 — 2.43 — ns tH_DEL Clock to Data Hold - PIO Input Register with Input Data Delay MachXO2-256ZE -0.44 — -0.44 — -0.44 — ns MachXO2-640ZE -0.43 — -0.43 — -0.43 — ns MachXO2-1200ZE -0.28 — -0.28 — -0.28 — ns MachXO2-2000ZE -0.31 — -0.31 — -0.31 — ns MachXO2-4000ZE -0.34 — -0.34 — -0.34 — ns MachXO2-7000ZE -0.21 — -0.21 — -0.21 — ns fMAX_IO Clock Frequency of I/O and PFU Register All MachXO2 devices — 150 — 125 — 104 MHz General I/O Pin Parameters (Using Edge Clock without PLL) tCOE Clock to Output - PIO Output Register MachXO2-1200ZE — 11.10 — 11.51 — 11.91 ns MachXO2-2000ZE — 11.10 — 11.51 — 11.91 ns MachXO2-4000ZE — 10.89 — 11.28 — 11.67 ns MachXO2-7000ZE — 11.10 — 11.51 — 11.91 ns tSUE Clock to Data Setup - PIO Input Register MachXO2-1200ZE -0.23 — -0.23 — -0.23 — ns MachXO2-2000ZE -0.23 — -0.23 — -0.23 — ns MachXO2-4000ZE -0.15 — -0.15 — -0.15 — ns MachXO2-7000ZE -0.23 — -0.23 — -0.23 — ns tHE Clock to Data Hold - PIO Input Register MachXO2-1200ZE 3.81 — 4.11 — 4.52 — ns MachXO2-2000ZE 3.81 — 4.11 — 4.52 — ns MachXO2-4000ZE 3.60 — 3.89 — 4.28 — ns MachXO2-7000ZE 3.81 — 4.11 — 4.52 — ns tSU_DELE Clock to Data Setup - PIO Input Register with Data Input Delay MachXO2-1200ZE 2.78 — 3.11 — 3.40 — ns MachXO2-2000ZE 2.78 — 3.11 — 3.40 — ns MachXO2-4000ZE 3.11 — 3.48 — 3.79 — ns MachXO2-7000ZE 2.94 — 3.30 — 3.60 — ns tH_DELE Clock to Data Hold - PIO Input Register with Input Data Delay MachXO2-1200ZE -0.29 — -0.29 — -0.29 — ns MachXO2-2000ZE -0.29 — -0.29 — -0.29 — ns MachXO2-4000ZE -0.46 — -0.46 — -0.46 — ns MachXO2-7000ZE -0.37 — -0.37 — -0.37 — ns General I/O Pin Parameters (Using Primary Clock with PLL) tCOPLL Clock to Output - PIO Output Register MachXO2-1200ZE — 7.95 — 8.07 — 8.19 ns MachXO2-2000ZE — 7.97 — 8.10 — 8.22 ns MachXO2-4000ZE — 7.98 — 8.10 — 8.23 ns MachXO2-7000ZE — 8.02 — 8.14 — 8.26 ns tSUPLL Clock to Data Setup - PIO Input Register MachXO2-1200ZE 0.85 — 0.85 — 0.89 — ns MachXO2-2000ZE 0.84 — 0.84 — 0.86 — ns MachXO2-4000ZE 0.84 — 0.84 — 0.85 — ns MachXO2-7000ZE 0.83 — 0.83 — 0.81 — ns Parameter Description Device -3 -2 -1 Units Min. Max. Min. Max. Min. Max. |
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