FV16KM202 datasheet(13/336 Pages) MICROCHIP

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Advance Information

DS33030A-page 13

PIC24FV16KM204 FAMILY

1.0

DEVICE OVERVIEW

This document contains device-specific information for

the following devices:

The PIC24FV16KM204 family introduces many new

analog features to the extreme low-power Microchip

devices. This is a 16-bit microcontroller family with a

broad peripheral feature set and enhanced computa-

tional performance. This family also offers a new

migration option for those high-performance applica-

tions which may be outgrowing their 8-bit platforms, but

do not require the numerical processing power of a

Digital Signal Processor (DSC).

1.1

Core Features

1.1.1

16-BIT ARCHITECTURE

Central to all PIC24F devices is the 16-bit modified

Harvard architecture, first introduced with Microchip’s

dsPIC® Digital Signal Controllers. The PIC24F CPU

core offers a wide range of enhancements, such as:

• 16-bit data and 24-bit address paths with the

ability to move information between data and

memory spaces

• Linear addressing of up to 16 Mbytes (program

space) and 16 Kbytes (data)

• A 16-element working register array with built-in

software stack support

• A 17 x 17 hardware multiplier with support for

integer math

• Hardware support for 32-bit by 16-bit division

• An instruction set that supports multiple address-

ing modes and is optimized for high-level

languages, such as C

• Operational performance up to 16 MIPS

1.1.2

POWER-SAVING TECHNOLOGY

All of the devices in the PIC24FV16KM204 family incor-

porate a range of features that can significantly reduce

power consumption during operation. Key features

include:

• On-the-Fly Clock Switching, to allow the device

clock to be changed under software control to the

Timer1 source or the internal, low-power RC

oscillator during operation, allowing users to

incorporate power-saving ideas into their software

designs.

• Doze Mode Operation, when timing-sensitive

applications, such as serial communications,

require the uninterrupted operation of peripherals,

the CPU clock speed can be selectively reduced,

allowing incremental power savings without

missing a beat.

• Instruction-Based Power-Saving Modes, to allow

the microcontroller to suspend all operations or

selectively shut down its core while leaving its

peripherals active with a single instruction in

software.

1.1.3

OSCILLATOR OPTIONS AND

FEATURES

The PIC24FV16KM204 family offers five different oscil-

lator options, allowing users a range of choices in

developing application hardware. These include:

• Two Crystal modes using crystals or ceramic

resonators.

• Two External Clock modes offering the option of a

divide-by-2 clock output.

• Two Fast Internal oscillators (FRCs), one with a

nominal 8 MHz output and the other with a

nominal 500 kHz output. These outputs can also

be divided under software control to provide clock

speed as low as 31 kHz or 2 kHz.

• A Phase Locked Loop (PLL) frequency multiplier,

available to the external oscillator modes and the

8 MHz FRC oscillator, which allows clock speeds

of up to 32 MHz.

• A separate internal RC oscillator (LPRC) with a

fixed 31 kHz output, which provides a low-power

option for timing-insensitive applications.

The internal oscillator block also provides a stable ref-

erence source for the Fail-Safe Clock Monitor (FSCM).

This option constantly monitors the main clock source

against a reference signal provided by the internal

oscillator and enables the controller to switch to the

internal oscillator, allowing for continued low-speed

operation or a safe application shutdown.

• PIC24FV08KM101

• PIC24F08KM101

• PIC24FV08KM102

• PIC24F08KM102

• PIC24FV16KM102

• PIC24F16KM102

• PIC24FV16KM104

• PIC24F16KM104

• PIC24FV08KM202

• PIC24F08KM202

• PIC24FV08KM204

• PIC24F08KM204

• PIC24FV16KM202

• PIC24F16KM202

• PIC24FV16KM204

• PIC24F16KM204

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