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AD5301 Datasheet(PDF) 3 Page - Analog Devices

Part # AD5301
Description  2.5 V to 5.5 V, 120 關A, 2-Wire Interface, Voltage-Output 8-/10-/12-Bit DACs
PDF  24 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD5301 Datasheet(HTML) 3 Page - Analog Devices

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AD5301/AD5311/AD5321
Rev. B | Page 3 of 24
SPECIFICATIONS
VDD = 2.5 V to 5.5 V; RL = 2 kΩ to GND; CL = 200 pF to GND; all specifications TMIN to TMAX, unless otherwise noted.
Table 1.
B Version1
Parameter2
Min
Typ
Max
Unit
Conditions/Comments
DC PERFORMANCE3, 4
AD5301
Resolution
8
Bits
Relative Accuracy
±0.15
±1
LSB
Differential Nonlinearity
±0.02
±0.25
LSB
Guaranteed monotonic by design over all codes.
AD5311
Resolution
10
Bits
Relative Accuracy
±0.5
±4
LSB
Differential Nonlinearity
±0.05
±0.5
LSB
Guaranteed monotonic by design over all codes.
AD5321
Resolution
12
Bits
Relative Accuracy
±2
±16
LSB
Differential Nonlinearity
±0.3
±0.8
LSB
Guaranteed monotonic by design over all codes.
Zero-Code Error
5
20
mV
All zeros loaded to DAC, see Figure 12.
Full-Scale Error
±0.15
±1.25
% of FSR
All ones loaded to DAC, see Figure 12.
Gain Error
±0.15
±1
% of FSR
Zero-Code Error Drift5
–20
μV/°C
Gain Error Drift5
−5
ppm of FSR/°C
OUTPUT CHARACTERISTICS5
Minimum Output Voltage
0.001
V
Maximum Output Voltage
VDD − 0.001
V
This is a measure of the minimum and maximum
drive capability of the output amplifier.
DC Output Impedance
1
Ω
Short-Circuit Current
50
mA
VDD = 5 V.
20
mA
VDD = 3 V.
Power-Up Time
2.5
μs
Coming out of power-down mode. VDD = 5 V.
6
μs
Coming out of power-down mode. VDD = 3 V.
LOGIC INPUTS (A0, A1, PD)5
Input Current
±1
μA
Input Low Voltage, VIL
0.8
V
VDD = 5 V ± 10%.
0.6
V
VDD = 3 V ± 10%.
0.5
V
VDD = 2.5 V.
Input High Voltage, VIH
2.4
V
VDD = 5 V ± 10%.
2.1
V
VDD = 3 V ± 10%.
2.0
V
VDD = 2.5 V.
Pin Capacitance
3
pF
LOGIC INPUTS (SCL, SDA)5
Input High Voltage, VIH
0.7 × VDD
VDD + 0.3
V
Input Low Voltage, VIL
−0.3
+0.3 × VDD
V
Input Leakage Current, IIN
±1
μA
VIN = 0 V to VDD.
Input Hysteresis, VHYST
0.05 × VDD
V
Input Capacitance, CIN
6
pF
Glitch Rejection6
50
ns
Pulse width of spike suppressed.



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