AD5322ARMZ datasheet(14/24 Pages) AD

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AD5302/AD5312/AD5322

Rev. D | Page 14 of 24

FUNCTIONAL DESCRIPTION

The AD5302/AD5312/AD5322 are dual resistor-string DACs

fabricated on a CMOS process with resolutions of 8, 10, and 12

bits, respectively. They contain reference buffers and output

buffer amplifiers, and are written to via a 3-wire serial interface.

They operate from single supplies of 2.5 V to 5.5 V, and the

output buffer amplifiers provide rail-to-rail output swing with a

slew rate of 0.7 V/μs. Each DAC is provided with a separate

reference input, which can be buffered to draw virtually no

current from the reference source, or unbuffered to give a

reference input range from GND to VDD. The devices have three

programmable power-down modes, in which one or both DACs

can be turned off completely with a high impedance output, or

the output can be pulled low by an on-chip resistor.

DIGITAL-TO-ANALOG SECTION

The architecture of one DAC channel consists of a reference

buffer and a resistor-string DAC followed by an output buffer

amplifier. The voltage at the VREF pin provides the reference

voltage for the DAC. Figure 28 shows a block diagram of the

DAC architecture. Because the input coding to the DAC is

straight binary, the ideal output voltage is given by

REF

OUT

where:

D = decimal equivalent of the binary code that is loaded to the

DAC register:

0 to 255 for AD5302 (8 bits)

0 to 1023 for AD5312 (10 bits)

0 to 4095 for AD5322 (12 bits)

N = DAC resolution.

INPUT

DAC

RESISTOR

STRING

OUTPUT BUFFER

AMPLIFIER

REFERENCE

BUFFER

SWITCH

CONTROLLED

BY CONTROL

LOGIC

VREFA

VOUTA

Figure 28. Single DAC Channel Architecture

RESISTOR STRING

The resistor-string section is shown in Figure 29. It is simply a

string of resistors, each of value R. The digital code loaded to

the DAC register determines at what node on the string the

voltage is tapped off to be fed into the output amplifier. The

voltage is tapped off by closing one of the switches connecting

the string to the amplifier. Because it is a string of resistors, it is

guaranteed monotonic.

TO OUTPUT

AMPLIFIER

Figure 29. Resistor String

DAC REFERENCE INPUTS

There is a reference input pin for each of the two DACs. The

reference inputs are buffered but can also be configured as

unbuffered. The advantage of the buffered input is the high

impedance it presents to the voltage source driving it.

However, if the unbuffered mode is used, the user can have a

reference voltage as low as GND and as high as VDD because

there is no restriction due to headroom and footroom of the

reference amplifier. If there is a buffered reference in the circuit

(for example, REF192), there is no need to use the on-chip

buffers of the AD5302/AD5312/AD5322. In unbuffered mode,

the impedance is still large (180 kΩ per reference input).

The buffered/unbuffered option is controlled by the BUF bit in

the control word (see the Serial Interface section for a

description of the register contents).

OUTPUT AMPLIFIER

The output buffer amplifier is capable of generating output

voltages to within 1 mV of either rail, which gives an output

range of 0.001 V to VDD – 0.001 V when the reference is VDD.

It is capable of driving a load of 2 kΩ in parallel with 500 pF to

GND and VDD. The source and sink capabilities of the output

amplifier can be seen in Figure 16.

The slew rate is 0.7 V/μs with a half-scale settling time to

±0.5 LSB (at eight bits) of 6 μs. See Figure 21.

POWER-ON RESET

The AD5302/AD5312/AD5322 are provided with a power-on

reset function to power them up in a defined state. The power-

on state is

•

Normal operation

•

Reference inputs unbuffered

•

Output voltage set to 0 V

Both input and DAC registers are filled with zeros and remain

so until a valid write sequence is made to the device. This is

particularly useful in applications where it is important to know

the state of the DAC outputs while the device is powering up.

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