LPC1850_13 datasheet(34/149 Pages) NXP

34 / 149 page

LPC1850_30_20_10

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Product data sheet

Rev. 6.1 — 7 February 2013

34 of 149

NXP Semiconductors

LPC1850/30/20/10

32-bit ARM Cortex-M3 microcontroller

P8_6

[2]

N; PU I/O

GPIO4[6] — General purpose digital input/output pin.

USB1_ULPI_NXT — ULPI link NXT signal. Data flow

control signal from the PHY.

R — Function reserved.

LCD_VD5 — LCD data.

LCD_LP — Line synchronization pulse (STN).

Horizontal synchronization pulse (TFT).

R — Function reserved.

T0_CAP2 — Capture input 2 of timer 0.

P8_7

[2]

N; PU I/O

GPIO4[7] — General purpose digital input/output pin.

USB1_ULPI_STP — ULPI link STP signal. Asserted to

end or interrupt transfers to the PHY.

R — Function reserved.

LCD_VD4 — LCD data.

LCD_PWR — LCD panel power enable.

R — Function reserved.

T0_CAP3 — Capture input 3 of timer 0.

P8_8

[2]

N; PU -

R — Function reserved.

USB1_ULPI_CLK — ULPI link CLK signal. 60 MHz

clock generated by the PHY.

R — Function reserved.

CGU_OUT0 — CGU spare clock output 0.

I2S1_TX_MCLK — I2S1 transmit master clock.

P9_0

[2]

N; PU I/O

GPIO4[12] — General purpose digital input/output pin.

MCABORT — Motor control PWM, LOW-active fast

abort.

R — Function reserved.

ENET_CRS — Ethernet Carrier Sense (MII interface).

R — Function reserved.

I/O

SSP0_SSEL — Slave Select for SSP0.

Table 3.

Pin description …continued

LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See Table 2.

Symbol

Description

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