SPC5604BF2MLL6 datasheet(77/109 Pages) FREESCALE

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Package pinouts and signal descriptions

MPC5604B/C Microcontroller Data Sheet, Rev. 11

Freescale Semiconductor

CP3

CC D ADC input pin

capacitance 3

——

—

RSW1 CC D Internal resistance of

analog source

——

—



RSW2 CC D Internal resistance of

analog source

——

—



RAD

CC D Internal resistance of

analog source

——

—



IINJ

SR — Input current Injection Current

injection on one

ADC input,

different from

the converted

one

VDD =

3.3 V ± 10%

5—

VDD =

5.0 V ± 10%

5—

| INL | CC T Absolute value for

integral non-linearity

No overload

—

0.5

1.5

LSB

| DNL | CC T Absolute differential

non-linearity

No overload

—

0.5

1.0

LSB

|EO | CC T Absolute offset error

—

0.5

—

LSB

|EG | CC T Absolute gain error

—

0.6

—

LSB

TUEp

CC P Total unadjusted error7

for precise channels,

input only pins

Without current injection

20.6

LSB

With current injection

33

TUEx

CC T Total unadjusted error7

for extended channel

Without current injection

31

LSB

With current injection

44

1 VDD = 3.3 V ± 10% / 5.0 V ± 10%, TA = 40 to 125 °C, unless otherwise specified.

2 Analog and digital VSS must be common (to be tied together externally).

3 VAINx may exceed VSS_ADC and VDD_ADC limits, remaining on absolute maximum ratings, but the results of the

conversion will be clamped respectively to 0x000 or 0x3FF.

4 Duty cycle is ensured by using system clock without prescaling. When ADCLKSEL = 0, the duty cycle is ensured

by internal divider by 2.

5 During the sampling time the input capacitance CS can be charged/discharged by the external source. The internal

resistance of the analog source must allow the capacitance to reach its final voltage level within ts. After the end of

the sampling time ts, changes of the analog input voltage have no effect on the conversion result. Values for the

sample clock ts depend on programming.

6 This parameter does not include the sampling time ts, but only the time for determining the digital result and the

time to load the result’s register with the conversion result.

7 Total Unadjusted Error: The maximum error that occurs without adjusting Offset and Gain errors. This error is a

combination of Offset, Gain and Integral Linearity errors.

Table 45. ADC conversion characteristics (continued)

Symbol

Parameter

Conditions1

Value

Unit

Min

Typ

Max

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