LM5010ASD datasheet(14/25 Pages) TI

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1.0k

LM5010A

BST

VCC

VOUT

ISEN

SGND

RTN

0.47 PF

GND

0.022 PF

1.0k

1.5

22 PF

0.022 PF

4.4 PF

0.1 PF

RON

200k

100 PH

6 - 60V

Input

VIN

RON/SD

C6 =

2.5V

tSS x 11.5 PA

LM5010A

LM5010A-Q1

SNVS376E – OCTOBER 2005 – REVISED FEBRUARY 2013

www.ti.com

If the capacitor used for C2 does not have sufficient ESR, R3 is added in series as shown in the Block Diagram.

The value chosen for C2 is application dependent, and it is recommended that it be no smaller than 3.3 µF. C2

affects the ripple at VOUT, and transient response. Experimentation is usually necessary to determine the

optimum value for C2.

C3: The capacitor at the VCC pin provides noise filtering and stability, prevents false triggering of the VCC UVLO

at the buck switch on/off transitions, and limits the peak voltage at VCC when a high voltage with a short rise time

is initially applied at VIN. C3 should be no smaller than 0.47 µF, and should be a good quality, low ESR, ceramic

capacitor, physically close to the IC pins.

C4: The recommended value for C4 is 0.022 µF. A high quality ceramic capacitor with low ESR is recommended

as C4 supplies the surge current to charge the buck switch gate at each turn-on. A low ESR also ensures a

complete recharge during each off-time.

C5: This capacitor suppresses transients and ringing due to lead inductance at VIN. A low ESR, 0.1 µF ceramic

chip capacitor is recommended, located physically close to the LM5010A.

C6: The capacitor at the SS pin determines the soft-start time, i.e. the time for the reference voltage at the

regulation comparator, and the output voltage, to reach their final value. The capacitor value is determined from

the following:

(22)

For a 5 ms softstart time, C6 calculates to 0.022 µF.

D1: A Schottky diode is recommended. Ultra-fast recovery diodes are not recommended as the high speed

transitions at the SW pin may inadvertently affect the IC’s operation through external or internal EMI. The diode

should be rated for the maximum VIN (60V), the maximum load current (1A), and the peak current which occurs

when current limit and maximum ripple current are reached simultaneously (IPK in Figure 10), previously

calculated to be 1.87A. The diode’s forward voltage drop affects efficiency due to the power dissipated during the

off-time. The average power dissipation in D1 is calculated from:

PD1 = VF x IO x (1 - D)

(23)

where IO is the load current, and D is the duty cycle.

FINAL CIRCUIT

The final circuit is shown in Figure 12, and its performance is shown in Figure 13 and Figure 14. Current limit

measured approximately 1.3A.

Figure 12. Example Circuit

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