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STM32F051K4U6 Datasheet(PDF) 73 Page - STMicroelectronics

Part # STM32F051K4U6
Description  Low- and medium-density advanced ARM??based 32-bit MCU with 16 to 64 Kbytes Flash, timers, ADC, DAC and comm. interfaces
PDF  104 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F051K4U6 Datasheet(HTML) 73 Page - STMicroelectronics

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Electrical characteristics
STM32F051x
74/105
Doc ID 022265 Rev 3
Input/output AC characteristics
The definition and values of input/output AC characteristics are given in Figure 20 and
Table 52, respectively.
Unless otherwise specified, the parameters given are derived from tests performed under
ambient temperature and VDD supply voltage conditions summarized in Table 20.
Table 52.
I/O AC characteristics(1)
OSPEEDRy
[1:0] value(1)
Symbol
Parameter
Conditions
Min
Max
Unit
x0
fmax(IO)out Maximum frequency
(2)
CL = 50 pF, VDD = 2 V to 3.6 V
-
2
MHz
tf(IO)out
Output high to low level
fall time
CL = 50 pF, VDD = 2 V to 3.6 V
-125(3)
ns
tr(IO)out
Output low to high level
rise time
-125(3)
01
fmax(IO)out Maximum frequency
(2)
CL = 50 pF, VDD = 2 V to 3.6 V
-
10
MHz
tf(IO)out
Output high to low level
fall time
CL = 50 pF, VDD = 2 V to 3.6 V
-25(3)
ns
tr(IO)out
Output low to high level
rise time
-25(3)
11
fmax(IO)out Maximum frequency
(2)
CL = 30 pF, VDD = 2.7 V to 3.6 V
-
50
MHz
CL = 50 pF, VDD = 2.7 V to 3.6 V
-
30
MHz
CL = 50 pF, VDD = 2 V to 2.7 V
-
20
MHz
tf(IO)out
Output high to low level
fall time
CL = 30 pF, VDD = 2.7 V to 3.6 V
-
5(3)
ns
CL = 50 pF, VDD = 2.7 V to 3.6 V
-
8(3)
CL = 50 pF, VDD = 2 V to 2.7 V
-
12(3)
tr(IO)out
Output low to high level
rise time
CL = 30 pF, VDD = 2.7 V to 3.6 V
-
5(3)
CL = 50 pF, VDD = 2.7 V to 3.6 V
-
8(3)
CL = 50 pF, VDD = 2 V to 2.7 V
-
12(3)
FM+
configuration
(4)
fmax(IO)out Maximum frequency
(2)
TBD
-
TBD
MHz
tf(IO)out
Output high to low level
fall time
TBD
-
TBD
ns
tr(IO)out
Output low to high level
rise time
TBD
-
TBD
tEXTIpw
Pulse width of external
signals detected by the
EXTI controller
10
-
ns
1.
The I/O speed is configured using the OSPEEDRx[1:0] bits. Refer to the RM0091 reference manual for a description of
GPIO Port configuration register.
2.
The maximum frequency is defined in Figure 20.
3.
Guaranteed by design, not tested in production.
4.
The I/O speed configuration is bypassed in FM+ I/O mode. Refer to the STM32F05xxx reference manual RM0091 for a
description of FM+ I/O mode configuration.



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