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EVAL-AD1871EB Datasheet(PDF) 6 Page - Analog Devices

Part # EVAL-AD1871EB
Description  Stereo Audio, 24-Bit, 96 kHz, Multibit - ADC
PDF  28 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

EVAL-AD1871EB Datasheet(HTML) 6 Page - Analog Devices

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AD1871
–6–
REV. 0
DATA INTERFACE TIMING (STANDALONE MODE–SLAVE)
Mnemonic
Description
Min
Typ
Max
Unit
Comment
tBCH
BCLK High Width
30
ns
tBCL
BCLK Low Width
30
ns
tBDSD
DOUT Delay
20
ns
From BCLK Falling
tLRS
LRCLK Setup
10
ns
To BCLK Rising
tLRH
LRCLK Hold
5
ns
From BCLK Rising
tBDSD
BCLK
LRCLK
DOUT
LEFT-JUSTIFIED
MODE
DOUT
RIGHT-JUSTIFIED
MODE
LSB
DOUT
I2S-JUSTIFIED
MODE
tBCH
tDBP
tBCL
MSB
MSB–1
MSB
MSB
8-BIT CLOCKS
(24-BIT DATA)
12-BIT CLOCKS
(20-BIT DATA)
16-BIT CLOCKS
(16-BIT DATA)
tLRS
Figure 3. Slave Data Interface Timing



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