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AN247 Datasheet(PDF) 5 Page - Microchip Technology

Part # AN247
Description  A CAN Bootloader for PIC18F CAN Microcontrollers
PDF  32 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

AN247 Datasheet(HTML) 5 Page - Microchip Technology

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 2003 Microchip Technology Inc.
DS00247A-page 5
AN247
Command and Data
There are four commands defined to add functionality
and reliability to the bootloader. These are summarized
in Table 2. They are:
• NOP: No operation. This is supplied to allow
writing Control registers without issuing a
command.
• RESET: Reset the device via the RESET
instruction.
• INIT_CHK: Initialize the checksum and verify reg-
isters. This clears the internal 16-bit checksum
and clears the verify flags.
• CHK_RUN: Test the checksum and verify registers;
if valid, then clear the last location of EEPROM.
Data is passed through the Data registers in the
Control register set and added to the checksum;
the program checks for zero. The internal
self-verify flag is also tested for zero.
Note that these are not the only commands that may be
implemented. Users may expand on this basic set by
using the high order bits of register D4, or using combi-
nations of bits to define an expanded command set.
Registers D5 through D7 may also be used to define
additional parameters in combination with commands.
The basic 8-register structure for control allows users
to expand the command sets to their own needs.
TABLE 2:
SUMMARY OF SPECIAL COMMANDS (COMMAND REGISTER D5)
BOOTLOADER DETAILS
Reading/Writing/Erasing Program
Memory
For writing to FLASH Program Memory, the Control
register address must point to memory region 000000h
to 2FFFFFh. Read operations occur at the byte level.
Write operations are performed on multiples of 8 bytes
(one block), while erase operations are performed on
64 bytes (one row).
Writing is an immediate operation. When the PUT
“DATA” command is received, the address already
stored in the Control registers is decoded and the data
is written to the target’s Program Memory. Data is only
written if the write operation has been unlocked.
When writing Program Memory, the memory should be
erased first. Either the auto erase or erase only options
can be used to erase memory on every 64-byte border.
The default operation is that bits can only be cleared
when written to. An erase operation is the only action
that can be used to set bits in Program Memory. Thus,
if the bootloader protection bits are not set up in the
Configuration registers, operations on memory from
000h to 1FFh could partially or completely disable the
bootloader firmware.
User IDs (starting at address 200000h) are considered
to be part of Program Memory and are written and
erased like normal FLASH Program Memory.
Reading/Writing EEPROM Data Memory
For writing to EEPROM Data Memory, the Control reg-
ister address must point to memory region F00000h to
FFFFFFh. Read and write operations occur at the byte
level. Write operations must be unlocked before any
write operation can take place.
Note that the last location of the Data Memory is used
as a boot flag. Writing anything other than FFh to the
last location indicates normal code execution.
Configuration Bits
PIC18F devices allow access to the device configura-
tion bits (addresses starting at 300000h) during normal
operation. In the bootloader, the Control register
address must point to memory region 300000h to
3FFFFFh to provide Configuration Memory access.
Data is read one byte at a time and, unlike Program
Memory, is written one byte at a time. Since configura-
tion bits are automatically erased before being written,
the erase control bit will have no affect on Configuration
Memory.
Having access to configuration settings is very power-
ful; it is also potentially very dangerous. For example,
assume that the system is designed to run in HS mode
with a 20 MHz crystal. If the bootloader changes the
oscillator setting to LP mode, the system will cease to
function - including the bootloader! Basically, the
system has been killed by improperly changing one bit.
Command
Code
Description
NOP
00h
No operation.
RESET
01h
Issue a Software Reset to the device.
INIT_CHK
02h
Initialize internal checksum and verify registers.
CHK_RUN
03h
Test the checksum and verify, then clear the last location of EEPROM if valid.
All other commands
04h - FFh Undefined - operate as NOP.



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