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DSPIC33FJ12MC201TESS Datasheet(PDF) 151 Page - Microchip Technology |
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DSPIC33FJ12MC201TESS Datasheet(HTML) 151 Page - Microchip Technology |
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151 / 304 page ![]() © 2007-2011 Microchip Technology Inc. DS70265E-page 151 dsPIC33FJ12MC201/202 14.0 OUTPUT COMPARE The Output Compare module can select either Timer2 or Timer3 for its time base. The module compares the value of the timer with the value of one or two compare registers depending on the operating mode selected. The state of the output pin changes when the timer value matches the compare register value. The Output Compare module generates either a single output pulse or a sequence of output pulses, by changing the state of the output pin on the compare match events. The Output Compare module can also generate interrupts on compare match events. The Output Compare module has multiple operating modes: • Active-Low One-Shot mode • Active-High One-Shot mode • Toggle mode • Delayed One-Shot mode • Continuous Pulse mode • PWM mode without fault protection • PWM mode with fault protection FIGURE 14-1: OUTPUT COMPARE MODULE BLOCK DIAGRAM Note 1: This data sheet summarizes the features of the dsPIC33FJ12MC201/202 family of devices. It is not intended to be a comprehensive reference source. To complement the information in this data sheet, refer to Section 13. “Output Compare” (DS70209) of the “dsPIC33F/ PIC24H Family Reference Manual” , which is available on the Microchip web- site (www.microchip.com). 2: Some registers and associated bits described in this section may not be available on all devices. Refer to Section 4.0 “Memory Organization” in this data sheet for device-specific register and bit information. OCxR Comparator Output Logic OCM<2:0> OCx Set Flag bit OCxIF OCxRS Mode Select 3 0 1 OCTSEL 0 1 16 16 OCFA TMR2 TMR2 Q S R TMR3 TMR3 Rollover Rollover Output Logic Output Enable Enable |
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