ADG508A/ADG509A

Rev. D | Page 8 of 16

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

A1

16

A2

15

GND

14

13

S5

12

S6

11

S7

10

S8

9

ADG508A

TOP VIEW

(Not to Scale)

Figure 3. ADG508A DIP, SOIC

4

5

S1

6

NC

7

S2

8

S3

18

GND

17

16

NC

15

S5

14

S6

19

20

1

2

3

13

12

11

10

9

ADG508A

TOP VIEW

(Not to Scale)

NC = NO CONNECT

Figure 4. ADG508A LCC

120

19

2

3

4

5

6

7

8

18

17

16

15

14

9

10

11

12

S1

NC

S2

S3

GND

NC

S5

S6

PIN 1

IDENTIFIER

ADG508A

TOP VIEW

(Not to Scale)

Figure 5. ADG508A PLCC

Table 4. ADG508A Pin Function Description

Pin Number

DIP/SOIC

PLCC/LCC

Mnemonic

Description

1

2

A0

Logic Control Input.

2

3

EN

Active High Digital Input. When low, the device is disabled and all switches are off.

When high, Ax logic inputs determine on switches.

3

4

Most Negative Power Supply Potential in Dual Supplies. In single-supply applications,

it can be connected to ground.

4

5

S1

Source Terminal 1. Can be an input or an output.

5

7

S2

Source Terminal 2. Can be an input or an output.

6

8

S3

Source Terminal 3. Can be an input or an output.

7

9

S4

Source Terminal 4. Can be an input or an output.

8

10

D

Drain Terminal. Can be an input or an output.

9

12

S8

Source Terminal 8. Can be an input or an output.

10

13

S7

Source Terminal 7. Can be an input or an output.

11

14

S6

Source Terminal 6. Can be an input or an output.

12

15

S5

Source Terminal 5. Can be an input or an output.

13

17

Most Positive Power Supply Potential.

14

18

GND

Ground (0 V) Reference.

15

19

A2

Logic Control Input.

16

20

A1

Logic Control Input.

N/A

1

NC

No Connect.

N/A

6

NC

No Connect.

N/A

11

NC

No Connect.

N/A

16

NC

No Connect.

Table 5. ADG508A Truth Table

A2

A1

A0

EN

On Switch

X1

X1

X

X

1

0

None

0

0

0

1

1

0

0

1

1

2

0

1

0

1

3

0

1

1

1

4

1

0

0

1

5

1

0

1

1

6

1

1

0

1

7

1

1

1

1

8