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LPC810M021FN8 Datasheet(PDF) 32 Page - NXP Semiconductors |
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LPC810M021FN8 Datasheet(HTML) 32 Page - NXP Semiconductors |
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32 / 71 page ![]() LPC81xM All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 3 — 29 July 2013 32 of 71 NXP Semiconductors LPC81xM 32-bit ARM Cortex-M0+ microcontroller 11. Static characteristics Table 9. Static characteristics Tamb = 40 C to +105 C, unless otherwise specified. Symbol Parameter Conditions Min Typ[1] Max Unit VDD supply voltage (core and external rail) 1.8 3.3 3.6 V IDD supply current Active mode; code while(1){} executed from flash; system clock = 12 MHz; default mode; VDD = 3.3 V [2][3][4] [6][7] -1.4 - mA system clock = 12 MHz; low-current mode; VDD = 3.3 V [2][3][4] [6][7] -1.0 - mA system clock = 24 MHz; low-current mode; VDD = 3.3 V [2][3][8] [6][7] -2.2 - mA system clock = 30 MHz; default mode; VDD = 3.3 V [2][3][6] [7][9] -3.3 - mA system clock = 30 MHz; low-current mode; VDD = 3.3 V [2][3][6] [7][9] -3 - mA Sleep mode; system clock = 12 MHz; default mode; VDD = 3.3 V [2][3][4] [6][7] -0.8 - mA system clock = 12 MHz; low-current mode; VDD = 3.3 V [2][3][4] [6][7] -0.7 - mA system clock = 24 MHz; low-current mode; VDD = 3.3 V [2][3][8] [6][7] -1.3 - mA system clock = 30 MHz; default mode; VDD = 3.3 V [2][3][9] [6][7] -1.8 - mA system clock = 30 MHz; low-current mode; VDD = 3.3 V [2][3][9] [6][7] -1.7 - mA Deep-sleep mode; VDD = 3.3 V [2][3][10] - 170 - A Power-down mode; VDD = 3.3 V [2][3][10] -1.8 - A Deep power-down mode; VDD = 3.3 V; Low-power oscillator off [2][11] - 220 - nA Low-power oscillator on/WKT wake-up enabled [2][11] -1 - A Standard port pins configured as digital pins, RESET; see Figure 12 IIL LOW-level input current VI = 0 V; on-chip pull-up resistor disabled - 0.5 10 nA IIH HIGH-level input current VI =VDD; on-chip pull-down resistor disabled - 0.5 10 nA IOZ OFF-state output current VO =0 V; VO =VDD; on-chip pull-up/down resistors disabled - 0.5 10 nA |
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