STM8L052C6 datasheet(27/102 Pages) STMICROELECTRONICS

27 / 102 page

STM8L052C6

Pin description

Doc ID 023331 Rev 1

27/102

Note:

The slope control of all GPIO pins, except true open drain pins, can be programmed. By

default, the slope control is limited to 2 MHz.

PE7/LCD_SEG27

I/O TT(2)

X Port E7 LCD segment 27

PF0/ADC1_IN24

I/O

X Port F0

ADC1_IN24

VLCD

LCD booster external capacitor

Reserved

Reserved. Must be tied to VDD

VDD

Digital power supply

VDDA

Analog supply voltage

VREF+

ADC1 positive voltage reference

9VSS1/VSSA/VREF-

I/O ground / Analog ground voltage /

ADC1 negative voltage reference

VDD2

IOs supply voltage

VSS2

IOs ground voltage

PA0(6)/[USART1_CK](8)/

SWIM/BEEP/IR_TIM (7)

I/O

X(6)

(7)

XX Port A0

[USART1 synchronous

clock](8) / SWIM input and

output /Beep output

/ Infrared Timer output

At power-up, the PA1/NRST pin is a reset input pin with pull-up. To be used as a general purpose pin (PA1), it can be

configured only as output open-drain or push-pull, not as a general purpose input. Refer to Section Configuring NRST/PA1

pin as general purpose output in the STM8L15x and STM8L16x reference manual (RM0031).

In the 3.6 V tolerant I/Os, protection diode to VDD is not implemented.

In the 5 V tolerant I/Os, protection diode to VDD is not implemented.

A pull-up is applied to PB0 and PB4 during the reset phase. These two pins are input floating after reset release.

In the open-drain output column, ‘T’ defines a true open-drain I/O (P-buffer, weak pull-up and protection diode to VDD are

not implemented).

The PA0 pin is in input pull-up during the reset phase and after reset release.

High Sink LED driver capability available on PA0.

[ ] Alternate function remapping option (if the same alternate function is shown twice, it indicates an exclusive choice not

aduplication of the function).

Table 4.

Medium density value line STM8L05xxx pin description (continued)

number

Pin name

Input

Output

Default alternate function

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