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Military ProASIC3/EL Low Power Flash FPGAs

Revision 3

1-5

Flash*Freeze Technology††

Military ProASIC3EL devices offer proven Flash*Freeze technology, which enables designers to

instantaneously shut off dynamic power consumption while retaining all SRAM and register information.

Flash*Freeze technology enables the user to quickly (within 1 µs) enter and exit Flash*Freeze mode by

activating the Flash*Freeze (FF) pin while all power supplies are kept at their original values. In addition,

I/Os and global I/Os can still be driven and can be toggling without impact on power consumption; clocks

can still be driven or can be toggling without impact on power consumption; all core registers and SRAM

cells retain their states. I/Os are tristated during Flash*Freeze mode or can be set to a certain state using

weak pull-up or pull-down I/O attribute configuration. No power is consumed by the I/O banks, clocks,

JTAG pins, or PLLs. Flash*Freeze technology allows the user to switch to active mode on demand, thus

simplifying the power management of the device.

The FF pin (active low) can be routed internally to the core to allow the user's logic to decide when it is

safe to transition to this mode. It is also possible to use the FF pin as a regular I/O if Flash*Freeze mode

usage is not planned, which is advantageous because of the inherent low-power static and dynamic

capabilities of the military ProASIC3EL device. Refer to Figure 1-3 for an illustration of entering/exiting

Flash*Freeze mode.

VersaTiles

The military ProASIC3/EL core consists of VersaTiles, which have been enhanced beyond the

ProASICPLUS® core tiles. The military ProASIC3/EL VersaTile supports the following:

•

All 3-input logic functions—LUT-3 equivalent

•

Latch with clear or set

•

D-flip-flop with clear or set

•

Enable D-flip-flop with clear or set

Refer to Figure 1-4 for VersaTile configurations.

††Flash*Freeze technology is not supported for A3P1000.

Figure 1-3 • Military ProASIC3EL Flash*Freeze Mode

Actel ProASIC3EL

FPGA

Flash*Freeze

Mode Control

Flash*Freeze Pin

Figure 1-4 • VersaTile Configurations

LUT-3

Data

CLK

Enable

CLR

D-FF

Data

CLK

CLR

D-FF

LUT-3 Equivalent

D-Flip-Flop with Clear or Set

Enable D-Flip-Flop with Clear or Set

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