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HD6473258P Datasheet(PDF) 13 Page - Renesas Technology Corp |
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HD6473258P Datasheet(HTML) 13 Page - Renesas Technology Corp |
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13 / 301 page ![]() Table 1-1. Features (cont.) Feature Description Serial communi- • Selection of asynchronous and synchronous modes cation interface • Simultaneous transmit and receive (full duplex operation) (SCI: 2 channels) • On-chip baud rate generator I/O ports • 53 input/output pins (of which 16 can drive large current loads) • All input pins have programmable input pull-ups Parallel hand- • Built-in parallel handshaking is available at port 3 shaking interface Interrupts • Four external interrupt pins: NMI, IRQ0 to IRQ2 • Seventeen on-chip interrupt sources Operating modes • Mode 1: expanded mode with on-chip ROM disabled • Mode 2: expanded mode with on-chip ROM enabled • Mode 3: single-chip mode Power-down • Sleep mode state • Software standby mode • Hardware standby mode Other features • On-chip clock oscillator • E clock output Product lineup Type code Type code (5V series) (3V series) Package ROM HD6473257C HD6473257VC 64-Pin windowed shrink DIP PROM (DC-64S) HD6473257P HD6473257VP 64-Pin shrink DIP (DP-64S) HD6473257F HD6473257VF 64-Pin QFP (FP-64A) HD6473257CP HD6473257VCP 68-Pin PLCC (CP-68) HD6433257P HD6433257VP 64-Pin shrink DIP (DP-64S) Masked HD6433257F HD6433257VF 64-Pin QFP (FP-64A) ROM HD6433257CP HD6433257VCP 68-Pin PLCC (CP-68) HD6473256P HD6473256VP 64-Pin shrink DIP (DP-64S) PROM HD6473256F HD6473256VF 64-Pin QFP (FP-64A) HD6473256CP HD6473256VCP 68-Pin PLCC (CP-68) HD6433256P HD6433256VP 64-Pin shrink DIP (DP-64S) Masked HD6433256F HD6433256VF 64-Pin QFP (FP-64A) ROM HD6433256CP HD6433256VCP 68-Pin PLCC (CP-68) 3 |
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