AD9266-80EBZ datasheet(19/32 Pages) AD

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Data Sheet

AD9266

Rev. A | Page 19 of 32

VOLTAGE REFERENCE

A stable and accurate 1.0 V voltage reference is built into the

AD9266. The VREF can be configured using either the internal

1.0 V reference or an externally applied 1.0 V reference voltage.

The various reference modes are summarized in the sections that

follow. The Reference Decoupling section describes the best

practices for PCB layout of VREF.

Internal Reference Connection

A comparator within the AD9266 detects the potential at the

SENSE pin and configures the reference into two possible modes,

which are summarized in Table 10. If SENSE is grounded, the

reference amplifier switch is connected to the internal resistor

divider (see Figure 42), setting VREF to 1.0 V.

VREF

SENSE

0.5V

ADC

SELECT

LOGIC

0.1µF

1.0µF

VIN–

VIN+

ADC

CORE

Figure 42. Internal Reference Configuration

If the internal reference of the AD9266 is used to drive multiple

converters to improve gain matching, the loading of the reference

by the other converters must be considered. Figure 43 shows

how the internal reference voltage is affected by loading.

–3.0

2.0

LOAD CURRENT (mA)

–0.5

–1.0

–1.5

–2.0

–2.5

0.2

0.4

0.6

0.8

1.0

1.4

1.6

1.8

1.2

INTERNAL VREF = 0.995V

Figure 43. VREF Accuracy vs. Load Current

External Reference Operation

The use of an external reference may be necessary to enhance

the gain accuracy of the ADC or improve thermal drift charac-

teristics. Figure 44 shows the typical drift characteristics of the

internal reference in 1.0 V mode.

–1

–2

–3

–4

–5

–6

–40

–20

TEMPERATURE (°C)

VREF ERROR (mV)

Figure 44. Typical VREF Drift

When the SENSE pin is tied to AVDD, the internal reference is

disabled, allowing the use of an external reference. An internal

reference buffer loads the external reference with an equivalent

7.5 kΩ load (see Figure 28). The internal buffer generates the posi-

tive and negative full-scale references for the ADC core. Therefore,

the external reference must be limited to a maximum of 1.0 V.

Table 10. Reference Configuration Summary

Selected Mode

SENSE Voltage (V)

Resulting VREF (V)

Resulting Differential Span (V p-p)

Fixed Internal Reference

AGND to 0.2

1.0 internal

2.0

Fixed External Reference

AVDD

1.0 applied to external VREF pin

2.0

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