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DM3725CBC Datasheet(PDF) 147 Page - Texas Instruments |
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DM3725CBC Datasheet(HTML) 147 Page - Texas Instruments |
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147 / 280 page ![]() swps038-125 = External pin VREF TVDET TVBUF + – I DAC AVDAC vssa_dac vdda_dac cvideo1_out cvideo1_vfb cvideo1_rset R SET R LOAD R OUT DM3730, DM3725 www.ti.com SPRS685D – AUGUST 2010 – REVISED JULY 2011 5 Video DAC Specifications NOTE For more information regarding the VideoDAC architecture, see the Display Subsystem / Display Subsystem Functional Description / Video Encoder Functionalities / Video DAC Stage —Architecture and Control section of AM/DM37x Technical Reference Manual (literature number SPRUGN4). 5.1 TVOUT Buffer Mode (DAC + Buffer) NOTE AVDAC normal mode (DAC + Buffer), higher values of the DAC input code provided by the Video Encoder will result in lower output voltage due to the inverting configuration of the TVOUT Buffer. See Figure 5-4 for more details on the relation between the composite video signal levels and the DAC code values for normal mode of operation. In AVDAC bypass mode (DAC only), higher values of the DAC input code will result in higher output voltage, as the TVOUT Buffer path is bypassed. The connection for this TVOUT buffer mode (DAC + Buffer) normal mode of operation is shown in Figure 5-1. The default mode of operation is dc coupling. For more information regarding the recommended values of the external components, see Section 5.4, Electrical Specifications Over Recommended Operating Conditions. Figure 5-1. Recommended Loading Conditions for TVOUT Buffer Mode(1) (1) In single-channel configuration only channel-1 is used. Copyright © 2010–2011, Texas Instruments Incorporated Video DAC Specifications 147 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 |
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