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DM3725CBC Datasheet(PDF) 143 Page - Texas Instruments |
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DM3725CBC Datasheet(HTML) 143 Page - Texas Instruments |
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143 / 280 page  DPLL_MPU DPLL_CORE DLL DPLL5 DPLL4 vdda_dplls_dll vdda_dpll_per C Noise Filter C Noise Filter 030-017 DPLL_IVA DM3730, DM3725 www.ti.com SPRS685D – AUGUST 2010 – REVISED JULY 2011 4.3.3 DPLL and DLL Noise Isolation The noise filters (decoupling capacitors) are required to suppress the switching noise generated by high frequency and to stabilize the supply voltage. A noise filter is most effective when it is close to the device, because this minimizes the inductance of the circuit board wiring and interconnects. Figure 4-8 illustrates an example of a noise filter. A. This circuit is provided only as an example. B. The filter must be located as close as possible to the device. Figure 4-8. DPLL Noise Filter Table 4-17 specifies the noise filter requirements. Table 4-17. DPLL Noise Filter Requirements(1) NAME MIN TYP MAX UNIT Filtering capacitor 50 100 150 nF (1) For more information, see IO and Analog Voltage Decoupling Capacitors. 4.3.4 Processor Clocks Table 4-18 through Table 4-20 show the clocks AC performance values. Table 4-18. Processor Voltages Without SmartReflexTM RETENTIO OPP50 OPP100 OPP130(3) N MIN MIN TYP MAX MIN TYP MAX MIN TYP MAX VDD1(1) (2) 0.8 0.92 0.97 1.02 1.08 1.14 1.2 1.21 1.27 1.33 (V) (1) At ball level. (2) Minimum OPP voltage values defined in this table include any voltage transient. (3) OPP130 is not available above TJ of 90C. Table 4-19. Processor Voltages With SmartReflexTM RETENTIO OPP50 OPP100 OPP130(4) OPP1G (4) (5)(6) N MIN MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX Copyright © 2010–2011, Texas Instruments Incorporated Clock Specifications 143 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 |
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