DM3725CBC datasheet(163/280 Pages) TI

163 / 280 page

DM3730, DM3725

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SPRS685D

– AUGUST 2010 – REVISED JULY 2011

–

H = (1 + 0.5 * OEExtraDelay) * GPMC_FCLK(14) if ((OEOnTime

– ClkActivationTime – 1) is a multiple of 3)

–

H = (2 + 0.5 * OEExtraDelay) * GPMC_FCLK(14) if ((OEOnTime

– ClkActivationTime – 2) is a multiple of 3)

For OE rising edge (OE deactivated):

–

Case GpmcFCLKDivider = 0:

–

H = 0.5 * OEExtraDelay * GPMC_FCLK(14)

–

Case GpmcFCLKDivider = 1:

–

H = 0.5 * OEExtraDelay * GPMC_FCLK(14) if (ClkActivationTime and OEOffTime are odd) or (ClkActivationTime and OEOffTime

are even)

–

H = (1 + 0.5 * OEExtraDelay) * GPMC_FCLK(14) otherwise

–

Case GpmcFCLKDivider = 2:

–

H = 0.5 * OEExtraDelay * GPMC_FCLK(14) if ((OEOffTime

– ClkActivationTime) is a multiple of 3)

–

H = (1 + 0.5 * OEExtraDelay) * GPMC_FCLK(14) if ((OEOffTime

– ClkActivationTime – 1) is a multiple of 3)

–

H = (2 + 0.5 * OEExtraDelay) * GPMC_FCLK(14) if ((OEOffTime

– ClkActivationTime – 2) is a multiple of 3)

(9) For WE falling edge (WE activated):

–

Case GpmcFCLKDivider = 0:

–

I = 0.5 * WEExtraDelay * GPMC_FCLK(14)

–

Case GpmcFCLKDivider = 1:

–

I = 0.5 * WEExtraDelay * GPMC_FCLK(14) if (ClkActivationTime and WEOnTime are odd) or (ClkActivationTime and WEOnTime

are even)

–

I = (1 + 0.5 * WEExtraDelay) * GPMC_FCLK(14) otherwise

–

Case GpmcFCLKDivider = 2:

–

I = 0.5 * WEExtraDelay * GPMC_FCLK(14) if ((WEOnTime

– ClkActivationTime) is a multiple of 3)

–

I = (1 + 0.5 * WEExtraDelay) * GPMC_FCLK(14) if ((WEOnTime

– ClkActivationTime – 1) is a multiple of 3)

–

I = (2 + 0.5 * WEExtraDelay) * GPMC_FCLK(14) if ((WEOnTime

– ClkActivationTime – 2) is a multiple of 3)

For WE rising edge (WE deactivated):

–

Case GpmcFCLKDivider = 0:

–

I = 0.5 * WEExtraDelay * GPMC_FCLK (14)

–

Case GpmcFCLKDivider = 1:

–

I = 0.5 * WEExtraDelay * GPMC_FCLK(14) if (ClkActivationTime and WEOffTime are odd) or (ClkActivationTime and WEOffTime

are even)

–

I = (1 + 0.5 * WEExtraDelay) * GPMC_FCLK(14) otherwise

–

Case GpmcFCLKDivider = 2:

–

I = 0.5 * WEExtraDelay * GPMC_FCLK(14) if ((WEOffTime

– ClkActivationTime) is a multiple of 3)

–

I = (1 + 0.5 * WEExtraDelay) * GPMC_FCLK(14) if ((WEOffTime

– ClkActivationTime – 1) is a multiple of 3)

–

I = (2 + 0.5 * WEExtraDelay) * GPMC_FCLK(14) if ((WEOffTime

– ClkActivationTime – 2) is a multiple of 3)

(10) J = GPMC_FCLK(14)

(11) In gpmc_ncsx, x is equal to 0, 1, 2, 3, 4, 5, 6, or 7. In gpmc_waitx, x is equal to 0, 1, 2, or 3.

(12) P = gpmc_clk period in ns

(13) For read: K = (ADVRdOffTime

– ADVOnTime) * (TimeParaGranularity + 1) * GPMC_FCLK(14)

For write: K = (ADVWrOffTime

– ADVOnTime) * (TimeParaGranularity + 1) * GPMC_FCLK(14)

(14) GPMC_FCLK is general-purpose memory controller internal functional clock period in ns.

(15) Related to the gpmc_clk output clock maximum and minimum frequencies programmable in the GPMC module by setting the

GPMC_CONFIG1_CSx configuration register bit field GpmcFCLKDivider.

(16) The jitter probability density can be approximated by a Gaussian function.

(17) M = (RdCycleTime

– AccessTime) * (TimeParaGranularity + 1) * GPMC_FCLK(14)

Above M parameter expression is given as one example of GPMC programming. IO DIR signal will go from IN to OUT after both

RdCycleTime and BusTurnAround completion. Behavior of IO direction signal does depend on kind of successive Read/Write accesses

performed to Memory and multiplexed or nonmultiplexed memory addressing scheme, bus keeping feature enabled or not. IO DIR

behaviour is automatically handled by GPMC controller. For a full description of the gpmc_io_dir feature, see the AM/DM37x Multimedia

Device Technical Reference Manual (literature number SPRUGN4).

(18) See Section 4.3.4, Processor Clocks.

Timing Requirements and Switching Characteristics

163

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