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AT45DB021E Datasheet(PDF) 13 Page - List of Unclassifed Manufacturers |
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AT45DB021E Datasheet(HTML) 13 Page - List of Unclassifed Manufacturers |
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13 / 68 page ![]() 13 AT45DB021E 8789E–DFLASH–10/2013 Table 6-1. Block Erase Addressing 6.8 Sector Erase The Sector Erase command can be used to individually erase any sector in the main memory. The main memory array is comprised of nine sectors, and only one sector can be erased at a time. To perform an erase of Sector 0a or Sector 0b with the standard DataFlash page size (264 bytes), an opcode of 7Ch must be clocked into the device followed by three address bytes comprised of five dummy bits, seven page address bits (PA9 - PA3), and 12 dummy bits. To perform a Sector 1-7 erase, an opcode of 7Ch must be clocked into the device followed by three address bytes comprised of five dummy bits, three page address bits (PA9 - PA7), and 16 dummy bits. To perform a Sector 0a or Sector 0b erase with the binary page size (256 bytes), an opcode of 7Ch must be clocked into the device followed by three address bytes comprised of six dummy bits, seven page address bits (A17 - A11), and 11 dummy bits. To perform a Sector 1-7 erase, an opcode of 7Ch must be clocked into the device followed by six dummy bits, three page address bits (A17 - A15), and 15 dummy bits. The page address bits are used to specify any valid address location within the sector is to be erased. When a low-to-high transition occurs on the CS pin, the device will erase the selected sector. The erase operation is internally self-timed and should take place in a maximum time of tSE. During this time, the RDY/BUSY bit in the Status Register will indicate that the device is busy. The device also incorporates an intelligent erase algorithm that can detect when a byte location fails to erase properly. If an erase error arises, it will be indicated by the EPE bit in the Status Register. PA9/A17 PA8/A16 PA7/A15 PA6/A14 PA5/A13 PA4/A12 PA3/A11 PA2/A10 PA1/A9 PA0/A8 Block 0 0 0 0 0 0 0 X X X 0 0 0 0 0 0 0 1 X X X 1 0 0 0 0 0 1 0 X X X 2 0 0 0 0 0 1 1 X X X 3 • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • 1 1 1 1 1 0 0 X X X 124 1 1 1 1 1 0 1 X X X 125 1 1 1 1 1 1 0 X X X 126 1 1 1 1 1 1 1 X X X 127 |
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