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PIC18F4550EMLSQTP Datasheet(PDF) 57 Page - Microchip Technology |
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PIC18F4550EMLSQTP Datasheet(HTML) 57 Page - Microchip Technology |
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57 / 438 page  © 2009 Microchip Technology Inc. DS39632E-page 55 PIC18F2455/2550/4455/4550 CCPR1H 2455 2550 4455 4550 xxxx xxxx uuuu uuuu uuuu uuuu CCPR1L 2455 2550 4455 4550 xxxx xxxx uuuu uuuu uuuu uuuu CCP1CON 2455 2550 4455 4550 --00 0000 --00 0000 --uu uuuu 2455 2550 4455 4550 0000 0000 0000 0000 uuuu uuuu CCPR2H 2455 2550 4455 4550 xxxx xxxx uuuu uuuu uuuu uuuu CCPR2L 2455 2550 4455 4550 xxxx xxxx uuuu uuuu uuuu uuuu CCP2CON 2455 2550 4455 4550 --00 0000 --00 0000 --uu uuuu BAUDCON 2455 2550 4455 4550 0100 0-00 0100 0-00 uuuu u-uu ECCP1DEL 2455 2550 4455 4550 0000 0000 0000 0000 uuuu uuuu ECCP1AS 2455 2550 4455 4550 0000 0000 0000 0000 uuuu uuuu CVRCON 2455 2550 4455 4550 0000 0000 0000 0000 uuuu uuuu CMCON 2455 2550 4455 4550 0000 0111 0000 0111 uuuu uuuu TMR3H 2455 2550 4455 4550 xxxx xxxx uuuu uuuu uuuu uuuu TMR3L 2455 2550 4455 4550 xxxx xxxx uuuu uuuu uuuu uuuu T3CON 2455 2550 4455 4550 0000 0000 uuuu uuuu uuuu uuuu SPBRGH 2455 2550 4455 4550 0000 0000 0000 0000 uuuu uuuu SPBRG 2455 2550 4455 4550 0000 0000 0000 0000 uuuu uuuu RCREG 2455 2550 4455 4550 0000 0000 0000 0000 uuuu uuuu TXREG 2455 2550 4455 4550 0000 0000 0000 0000 uuuu uuuu TXSTA 2455 2550 4455 4550 0000 0010 0000 0010 uuuu uuuu RCSTA 2455 2550 4455 4550 0000 000x 0000 000x uuuu uuuu EEADR 2455 2550 4455 4550 0000 0000 0000 0000 uuuu uuuu EEDATA 2455 2550 4455 4550 0000 0000 0000 0000 uuuu uuuu EECON2 2455 2550 4455 4550 0000 0000 0000 0000 0000 0000 EECON1 2455 2550 4455 4550 xx-0 x000 uu-0 u000 uu-0 u000 TABLE 4-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED) Register Applicable Devices Power-on Reset, Brown-out Reset MCLR Resets, WDT Reset, RESET Instruction, Stack Resets Wake-up via WDT or Interrupt Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition. Shaded cells indicate conditions do not apply for the designated device. Note 1: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack. 2: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up). 3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector (0008h or 0018h). 4: See Table 4-3 for Reset value for specific condition. 5: PORTA<6>, LATA<6> and TRISA<6> are enabled depending on the oscillator mode selected. When not enabled as PORTA pins, they are disabled and read ‘0’. |
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