PCI Express debug and analysis spanning

Physical to Transaction-layer with feature-

rich hardware

PCI Express 3.0 introduces new challenges for validation engineers. Time-

to-market pressures require a solution that can quickly pinpoint problems.

The TLA7SA00 Series logic protocol analyzer modules provide an

innovative approach to PCI Express validation that spans all layers of the

protocol from the Physical layer to the Transaction layer.

Reduce the time to information by viewing and searching up to 16 GB deep

memory in just seconds with rapid display updates enabled by our industry-

leading hardware acceleration.

Features such as auto-training, auto-tracking, front-panel LED lane status,

single-click calibration, allow the logic protocol analyzer to "wire" itself

automatically which shortens the time it takes for users to build confidence

in the test system.

Quickly trigger on patterns of interest with powerful trigger capabilities that

span across all protocol layers. Real-time filtering provides the ability to

filter unwanted data and use the acquisition memory more efficiently by

storing only transactions of interest.

Elusive power state anomalies pertaining to entry into and exit from

electrical idle and ASPM states such as L0s to L0 are easily addressed by

FastSYNC technology. It ensures quick re-synchronization of the logic

protocol analyzer with the PCI Express FTS ordered sets regardless of the

duration of electrical Idle time. This capability is unique compared to other

solutions where the L0s to L0 re-synchronization time is specified only over

a short electrical idle time of 2 μs or less.

Innovative data displays for accelerated time

to information

The new PCI Express software helps view information in a hierarchical and

rich format. Protocol information can be expanded and collapsed to rapidly

display or hide information as needed.

Quickly ascertain the health of the system and identify patterns of interest

(errors, specific transactions, ordered sets) with statistical summary and

data graphs using the Summary Profile window. Summary statistics include

useful information such as average transaction latency, total bytes

transmitted, and bus utilization.

Summary Profile window

TLA7SA00 Logic Protocol Analyzer Datasheet

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