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A3P030 Datasheet(PDF) 121 Page - Microsemi Corporation |
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A3P030 Datasheet(HTML) 121 Page - Microsemi Corporation |
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121 / 220 page ![]() ProASIC3 Flash Family FPGAs Revision 13 2-107 Embedded FlashROM Characteristics Timing Characteristics Figure 2-43 • Timing Diagram A0 A1 tSU tHOLD tSU tHOLD tSU tHOLD tCKQ2 tCKQ2 tCKQ2 CLK Address Data D0 D0 D1 Table 2-124 • Embedded FlashROM Access Time Parameter Description –2 –1 Std. Units tSU Address Setup Time 0.53 0.61 0.71 ns tHOLD Address Hold Time 0.00 0.00 0.00 ns tCK2Q Clock to Out 21.42 24.40 28.68 ns FMAX Maximum Clock Frequency 15 15 15 MHz |
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