AM79C976 datasheet(202/309 Pages) AMD

202 / 309 page

202

Am79C976

8/01/00

P R E L I M INARY

The logical value of the LEDOUT

status signal is determined by the

settings of the individual Status

Enable bits of the LED register

(bits 8 and 6-0).

This bit is read only, writes have

no effect. LEDOUT is unaffected

H_RESET,

S_RESET,

STOP.

LEDPOL

LED Polarity. When this bit has

the value 0, then the LED pin will

be driven to a LOW level whenev-

er the OR of the enabled signals

is true, and the LED pin will be

disabled and allowed to float high

whenever the OR of the enabled

signals is false (i.e., the LED out-

put will be an Open Drain output

and the output value will be the

inverse of the LEDOUT status

bit).

When this bit has the value 1,

then the LED pin will be driven to

a HIGH level whenever the OR of

the enabled signals is true, and

the LED pin will be driven to a

LOW level whenever the OR of

the enabled signals is false (i.e.,

the LED output will be a Totem

Pole output and the output value

will be the same polarity as the

LEDOUT status bit).

The setting of this bit will not ef-

fect the polarity of the LEDOUT

bit for this register.

Read/Write accessible. LEDPOL

is cleared by H_RESET and is

not affected by S_RESET or set-

ting the STOP bit.

LEDDIS

LED Disable. This bit is used to

disable the LED output. When

LEDDIS has the value 1, then the

LED output will always be dis-

abled. When LEDDIS has the val-

ue 0, then the LED output value

will be governed by the LEDOUT

and LEDPOL values.

Read/Write accessible. LEDDIS

is cleared by H_RESET and is

not affected by S_RESET or set-

ting the STOP bit.

100E

100 Mbps Enable. When this bit

is set to 1, a value of 1 is passed

to the LEDOUT bit in this register

when the Am79C976 controller is

operating at 100 Mbps mode.

Read/Write accessible. 100E is

cleared by H_RESET and is not

affected by S_RESET or setting

the STOP bit.

11-10

RES

Reserved locations. Written and

read as zeros.

MPSE

Magic Packet Status Enable.

When this bit is set to 1, a value

of 1 is passed to the LEDOUT bit

in this register when Magic Pack-

et mode is enabled and a Magic

Packet frame is detected on the

network.

Read/Write accessible. MPSE is

cleared by H_RESET and is not

affected by S_RESET or setting

the STOP bit.

FDLSE

Full-Duplex Link Status Enable.

Indicates the Full-Duplex Link

Test Status. When this bit is set,

a value of 1 is passed to the LED-

OUT signal when the Am79C976

controller is functioning in a Link

Pass state and full-duplex opera-

tion

enabled.

When

the

Am79C976 controller is not func-

tioning in a Link Pass state with

full-duplex operation being en-

abled, a value of 0 is passed to

the LEDOUT signal.

Read/Write accessible. FDLSE is

cleared by H_RESET and is not

affected by S_RESET or setting

the STOP bit.

PSE

Pulse Stretcher Enable. When

this bit is set, the LED illumination

time is extended for each new oc-

currence of the enabled function

for this LED output. A value of 0

disables the pulse stretcher.

Read/Write accessible. PSE is

set to 1 by H_RESET and is not

affected by S_RESET or setting

the STOP bit.

AM79C976 Datasheet(PDF) 202 Page - Advanced Micro Devices

AM79C976 Datasheet(HTML) 202 Page - Advanced Micro Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL