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STM8L051F3P6 Datasheet(PDF) 7 Page - STMicroelectronics |
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STM8L051F3P6 Datasheet(HTML) 7 Page - STMicroelectronics |
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7 / 46 page  STM8L051F3 Description Doc ID 022985 Rev 1 7/46 2 Description The low density value line STM8L05xxx devices are members of the STM8L ultra low power 8-bit family. The STM8L ultra low power family features an enhanced STM8 CPU core providing increased processing power (up to 16 MIPS at 16 MHz) while maintaining the advantages of a CISC architecture with improved code density, a 24-bit linear addressing space and an optimized architecture for low power operations. The family includes an integrated debug module with a hardware interface (SWIM) which allows non-intrusive In-Application debugging and ultra-fast Flash programming. Low density value line STM8L05xxx microcontrollers feature embedded data EEPROM and low power, low-voltage, single-supply program Flash memory. The devices incorporate an extensive range of enhanced I/Os and peripherals, a 12-bit ADC, a real-time clock, two 16-bit timers, one 8-bit timer, as well as standard communication interfaces such as an SPI, an I2C interface, and one USART. The modular design of the peripheral set allows the same peripherals to be found in different ST microcontroller families including 32-bit families. This makes any transition to a different family very easy, and simplified even more by the use of a common set of development tools. All STM8L ultra low power products are based on the same architecture with the same memory mapping and a coherent pinout. |
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