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STM8S103F3P3TR Datasheet(PDF) 69 Page - STMicroelectronics |
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STM8S103F3P3TR Datasheet(HTML) 69 Page - STMicroelectronics |
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69 / 113 page ![]() Unit Max Typ Min (1) Conditions Parameter Symbol 1 TRET = 85°C Data retention (data memory) after 300k erase/write cycles at TA = +125 °C mA 2 Supply current (Flash programming or erasing IDD for 1 to 128 bytes) (1) Data based on characterization results, not tested in production. (2) The physical granularity of the memory is 4 bytes, so cycling is performed on 4 bytes even when a write/erase operation addresses a single byte. I/O port pin characteristics 10.3.6 General characteristics Subject to general operating conditions for VDD and TA unless otherwise specified. All unused pins must be kept at a fixed voltage: using the output mode of the I/O for example or an external pull-up or pull-down resistor. Table 38: I/O static characteristics Unit Max Typ Min Conditions Parameter Symbol V 0.3 x VDD -0.3 V VDD = 5 V Input low level voltage VIL VDD + 0.3 0.7 x VDD Input high level voltage VIH mV 700 Hysteresis (1) Vhys kΩ 60 45 30 VDD = 5 V, VIN = VSS Pull-up resistor Rpu ns 20 (2) Fast I/Os Load = 50 pF Rise and fall time (10 % - 90 %) tR, tF 125 (2) Standard and high sink I/Os Load = 50 pF μA ±1 (2) VSS ≤ VIN ≤VDD Digital input leakage current Ilkg 69/113 DocID15441 Rev 6 Electrical characteristics STM8S103K3 STM8S103F3 STM8S103F2 |
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