74LVC1G97

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© NXP B.V. 2011. All rights reserved.

Product data sheet

Rev. 3 — 7 December 2011

3 of 20

NXP Semiconductors

74LVC1G97

Low-power configurable multiple function gate

6.

Pinning information

6.1 Pinning

6.2 Pin description

7.

Functional description

[1]

H = HIGH voltage level; L = LOW voltage level.

Fig 2.

Pin configuration SOT363

and SOT457

Fig 3.

Pin configuration SOT886

Fig 4.

Pin configuration SOT891,

SOT1115 and SOT1202

74LVC1G97

BC

GND

AY

001aan190

1

2

3

6

5

4

74LVC1G97

GND

001aan191

B

A

C

Y

Transparent top view

2

3

1

5

4

6

74LVC1G97

GND

001aan192

B

A

C

Y

Transparent top view

2

3

1

5

4

6

Table 3.

Pin description

Symbol

Pin

Description

B

1

data input

GND

2

ground (0 V)

A

3

data input

Y

4

data output

5

supply voltage

C

6

data input

Table 4.

Function table[1]

Input

Output

C

B

A

Y

LL

LL

LL

H

L

LH

LH

LH

H

H

HL

L

L

HL

HH

HH

L

L

HH

HH