64GA106 datasheet(254/330 Pages) MICROCHIP

254 / 330 page

PIC24FJ256GA110 FAMILY

DS39905E-page 254

 2010 Microchip Technology Inc.

25.4.2

CODE SEGMENT PROTECTION

In addition to global General Segment protection, a

separate subrange of the program memory space can

be individually protected against writes and erases.

This area can be used for many purposes where a

separate block of erase and write-protected code is

needed, such as bootloader applications. Unlike

common boot block implementations, the specially pro-

tected segment in the PIC24FJ256GA110 family

devices can be located by the user anywhere in the

program space and configured in a wide range of sizes.

Code segment protection provides an added level of

protection to a designated area of program memory by

disabling the NVM safety interlock whenever a write or

erase address falls within a specified range. It does not

override General Segment protection controlled by the

GCP or GWRP bits. For example, if GCP and GWRP

are enabled, enabling segmented code protection for

the bottom half of program memory does not undo

General Segment protection for the top half.

The size and type of protection for the segmented code

range are configured by the WPFPx, WPEND, WPCFG

and WPDIS bits in Flash Configuration Word 3. Code

segment protection is enabled by programming the

WPDIS bit (= 0). The WPFP bits specify the size of the

segment to be protected by specifying the 512-word

code page that is the start or end of the protected

segment. The specified region is inclusive, therefore,

this page will also be protected.

The WPEND bit determines if the protected segment

uses the top or bottom of the program space as a

boundary. Programming WPEND (= 0) sets the bottom

of program memory (000000h) as the lower boundary

the

protected

segment.

Leaving

WPEND

unprogrammed (= 1) protects the specified page

through the last page of implemented program

memory, including the Configuration Word locations.

A separate bit, WPCFG, is used to independently protect

the last page of program space, including the Flash Con-

figuration Words. If WPEND is set to protect the bottom

of program memory, programming WPCFG (= 0) pro-

tects the last page. This may be useful in circumstances

where write protection is needed for both a code

segment in the bottom of memory, as well as the Flash

Configuration Words.

The various options for segment code protection are

shown in Table 25-2.

25.4.3

CONFIGURATION REGISTER

PROTECTION

The Configuration registers are protected against

inadvertent or unwanted changes, or reads in two

ways. The primary protection method is the same as

that of the RP registers – shadow registers contain a

complimentary value which is constantly compared

with the actual value.

To safeguard against unpredictable events, Configura-

tion bit changes resulting from individual cell level

disruptions (such as ESD events) will cause a parity

error and trigger a device Reset.

The data for the Configuration registers is derived from

the Flash Configuration Words in program memory.

When the GCP bit is set, the source data for device

configuration is also protected as a consequence. Even

if General Segment protection is not enabled, the

device configuration can be protected by using the

appropriate code segment protection setting.

TABLE 25-2:

SEGMENT CODE PROTECTION CONFIGURATION OPTIONS

Segment Configuration Bits

Write/Erase Protection of Code Segment

WPDIS

WPEND

WPCFG

1xx

No additional protection enabled; all program memory protection is configured

by GCP and GWRP

01x

Addresses from the first address of code page, defined by WPFP<7:0> through

the end of implemented program memory (inclusive), are write/erase protected

including Flash Configuration Words

001

Address, 000000h through the last address of code page, defined by

WPFP<7:0> (inclusive), is protected

000

Address, 000000h through the last address of code page, defined by

WPFP<7:0> (inclusive) are write/erase protected and the last page is also

write/erase protected.

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