PIC16F84A datasheet(102/337 Pages) MICROCHIP

102 / 337 page

PIC16C6X

DS30234D-page 102

11.5.1.3

TRANSMISSION

When the R/W bit of the incoming address byte is set

and an address match occurs, the R/W bit of the

SSPSTAT register is set. The received address is

loaded into the SSPBUF register. The ACK pulse will

be sent on the ninth bit, and pin RC3/SCK/SCL is held

low. The transmit data must be loaded into the SSP-

BUF register, which also loads the SSPSR register.

Then pin RC3/SCK/SCL should be enabled by setting

bit CKP (SSPCON<4>). The master must monitor the

SCL pin prior to asserting another clock pulse. The

slave devices may be holding off the master by stretch-

ing the clock. The eight data bits are shifted out on the

falling edge of the SCL input. This ensures that the SDA

signal is valid during the SCL high time (Figure 11-26).

An SSP interrupt is generated for each data transfer

byte. Flag bit SSPIF must be cleared in software, and

the SSPSTAT register is used to determine the status

of the byte. Flag bit SSPIF is set on the falling edge of

the ninth clock pulse.

As a slave-transmitter, the ACK pulse from the master-

receiver is latched on the rising edge of the ninth SCL

input pulse. If the SDA line was high (not ACK), then the

data transfer is complete. When the ACK is latched by

the slave, the slave logic is reset (resets SSPSTAT reg-

ister) and the slave then monitors for another occur-

rence of the START bit. If the SDA line was low (ACK),

the transmit data must be loaded into the SSPBUF reg-

ister, which also loads the SSPSR register. Then pin

RC3/SCK/SCL should be enabled by setting bit CKP.

FIGURE 11-26: I2C WAVEFORMS FOR TRANSMISSION (7-BIT ADDRESS)

SDA

SCL

SSPIF (PIR1<3>)

BF (SSPSTAT<0>)

CKP (SSPCON<4>)

ACK

Transmitting Data

R/W = 1

Receiving Address

56789

123

cleared in software

SSPBUF is written in software

From SSP interrupt

service routine

Set bit after writing to SSPBUF

Data in

sampled

SCL held low

while CPU

responds to SSPIF

(the SSPBUF must be written-to

before the CKP bit can be set)

Applicable Devices

61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67

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