CDC7005

3.3V HIGH PERFORMANCE CLOCK SYNTHESIZER AND JITTER CLEANER

SCAS685L− DECEMBER 2002 − REVISED JUNE 2009

13

POST OFFICE BOX 655303

−0.5 V to 4.6 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±20 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

−50 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±50 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

−65

°C to 150°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

125

°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES:

2. All supply voltages must be the same value and must be supplied at the same time.

NOTES:

3. The input and output negative voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

package thermal resistance for RGZ (QFN) package (see Note 4 and Note 5)

AIRFLOW (LFM)

YJT (5C/W)

0

29.9

22.4

1.5

0.2

15

24.7

0.2

250

23.2

0.2

500

21.5

0.3

NOTE 4: The package thermal impedance is calculated in accordance with JESD 51 and JEDEC2S2P (high-k board).

NOTE 5: Connected to GND with nine thermal vias (0,3 mm diameter).

package thermal resistance for ZVA (BGA) package (see Note 6)

AIRFLOW (m/s)

YJT (5C/W)

0

54

29.9

44.5

0.9

1

49

0.9

2.5

47.2

0.9

NOTE 6: The package thermal impedance is calculated in accordance with JESD 51 and JEDEC2S2P (high-k board).

recommended operating conditions

MIN

NOM

MAX

UNIT

Supply voltage, VCC

3

3.3

3.6

V

Operating free-air temperature, TA

−40

85

°C

Low-level input voltage LVCMOS, VIL

0.3 VCC

V

High-level input voltage LVCMOS, VIH

0.7 VCC

V

Input threshold voltage LVCMOS, VIT

0.5 VCC

V

High-level output current LVCMOS, IOH

−6

mA

Low-level output current LVCMOS, IOL

6

mA

Input voltage range LVCMOS, VI

0

3.6

V

Input amplitude LVPECL, VINPP [(VVCXO_IN − VVCXO_INB), See Note 7]

0.5

1.3

V

Common-mode input voltage LVPECL, VIC

V

NOTE 7: VINPP minimum and maximum is required to maintain ac specifications; the actual device function tolerates at a minimum

VINPP of 100 mV.